* Create Send Queue using DevX API. * * Get a pointer to partially initialized attributes structure, and updates the * following fields: * wq_type * wq_umem_valid * wq_umem_id * wq_umem_offset * dbr_umem_valid * dbr_umem_id * dbr_addr * log_wq_stride * log_wq_sz * log_wq_pg_sz * All other fields are updated by caller. * * @param[in] ctx * Context returned fro
| 205 | * 0 on success, a negative errno value otherwise and rte_errno is set. |
| 206 | */ |
| 207 | int |
| 208 | mlx5_devx_sq_create(void *ctx, struct mlx5_devx_sq *sq_obj, uint16_t log_wqbb_n, |
| 209 | struct mlx5_devx_create_sq_attr *attr, int socket) |
| 210 | { |
| 211 | struct mlx5_devx_obj *sq = NULL; |
| 212 | struct mlx5dv_devx_umem *umem_obj = NULL; |
| 213 | void *umem_buf = NULL; |
| 214 | size_t alignment = MLX5_WQE_BUF_ALIGNMENT; |
| 215 | uint32_t umem_size, umem_dbrec; |
| 216 | uint32_t num_of_wqbbs = RTE_BIT32(log_wqbb_n); |
| 217 | int ret; |
| 218 | |
| 219 | if (alignment == (size_t)-1) { |
| 220 | DRV_LOG(ERR, "Failed to get WQE buf alignment."); |
| 221 | rte_errno = ENOMEM; |
| 222 | return -rte_errno; |
| 223 | } |
| 224 | /* Allocate memory buffer for WQEs and doorbell record. */ |
| 225 | umem_size = MLX5_WQE_SIZE * num_of_wqbbs; |
| 226 | umem_dbrec = RTE_ALIGN(umem_size, MLX5_DBR_SIZE); |
| 227 | umem_size += MLX5_DBR_SIZE; |
| 228 | umem_buf = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, umem_size, |
| 229 | alignment, socket); |
| 230 | if (!umem_buf) { |
| 231 | DRV_LOG(ERR, "Failed to allocate memory for SQ."); |
| 232 | rte_errno = ENOMEM; |
| 233 | return -rte_errno; |
| 234 | } |
| 235 | /* Register allocated buffer in user space with DevX. */ |
| 236 | umem_obj = mlx5_os_umem_reg(ctx, (void *)(uintptr_t)umem_buf, umem_size, |
| 237 | IBV_ACCESS_LOCAL_WRITE); |
| 238 | if (!umem_obj) { |
| 239 | DRV_LOG(ERR, "Failed to register umem for SQ."); |
| 240 | rte_errno = errno; |
| 241 | goto error; |
| 242 | } |
| 243 | /* Fill attributes for SQ object creation. */ |
| 244 | attr->wq_attr.wq_type = MLX5_WQ_TYPE_CYCLIC; |
| 245 | attr->wq_attr.wq_umem_valid = 1; |
| 246 | attr->wq_attr.wq_umem_id = mlx5_os_get_umem_id(umem_obj); |
| 247 | attr->wq_attr.wq_umem_offset = 0; |
| 248 | attr->wq_attr.dbr_umem_valid = 1; |
| 249 | attr->wq_attr.dbr_umem_id = attr->wq_attr.wq_umem_id; |
| 250 | attr->wq_attr.dbr_addr = umem_dbrec; |
| 251 | attr->wq_attr.log_wq_stride = rte_log2_u32(MLX5_WQE_SIZE); |
| 252 | attr->wq_attr.log_wq_sz = log_wqbb_n; |
| 253 | attr->wq_attr.log_wq_pg_sz = MLX5_LOG_PAGE_SIZE; |
| 254 | /* Create send queue object with DevX. */ |
| 255 | sq = mlx5_devx_cmd_create_sq(ctx, attr); |
| 256 | if (!sq) { |
| 257 | DRV_LOG(ERR, "Can't create DevX SQ object."); |
| 258 | rte_errno = ENOMEM; |
| 259 | goto error; |
| 260 | } |
| 261 | sq_obj->umem_buf = umem_buf; |
| 262 | sq_obj->umem_obj = umem_obj; |
| 263 | sq_obj->sq = sq; |
| 264 | sq_obj->db_rec = RTE_PTR_ADD(sq_obj->umem_buf, umem_dbrec); |
no test coverage detected