| 772 | } |
| 773 | |
| 774 | int |
| 775 | idpf_vc_queue_switch(struct idpf_vport *vport, uint16_t qid, |
| 776 | bool rx, bool on) |
| 777 | { |
| 778 | uint32_t type; |
| 779 | int err, queue_id; |
| 780 | |
| 781 | /* switch txq/rxq */ |
| 782 | type = rx ? VIRTCHNL2_QUEUE_TYPE_RX : VIRTCHNL2_QUEUE_TYPE_TX; |
| 783 | |
| 784 | if (type == VIRTCHNL2_QUEUE_TYPE_RX) |
| 785 | queue_id = vport->chunks_info.rx_start_qid + qid; |
| 786 | else |
| 787 | queue_id = vport->chunks_info.tx_start_qid + qid; |
| 788 | err = idpf_vc_ena_dis_one_queue(vport, queue_id, type, on); |
| 789 | if (err != 0) |
| 790 | return err; |
| 791 | |
| 792 | /* switch tx completion queue */ |
| 793 | if (!rx && vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT) { |
| 794 | type = VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION; |
| 795 | queue_id = vport->chunks_info.tx_compl_start_qid + qid; |
| 796 | err = idpf_vc_ena_dis_one_queue(vport, queue_id, type, on); |
| 797 | if (err != 0) |
| 798 | return err; |
| 799 | } |
| 800 | |
| 801 | /* switch rx buffer queue */ |
| 802 | if (rx && vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT) { |
| 803 | type = VIRTCHNL2_QUEUE_TYPE_RX_BUFFER; |
| 804 | queue_id = vport->chunks_info.rx_buf_start_qid + 2 * qid; |
| 805 | err = idpf_vc_ena_dis_one_queue(vport, queue_id, type, on); |
| 806 | if (err != 0) |
| 807 | return err; |
| 808 | queue_id++; |
| 809 | err = idpf_vc_ena_dis_one_queue(vport, queue_id, type, on); |
| 810 | if (err != 0) |
| 811 | return err; |
| 812 | } |
| 813 | |
| 814 | return err; |
| 815 | } |
| 816 | |
| 817 | #define IDPF_RXTX_QUEUE_CHUNKS_NUM 2 |
| 818 | int |
no test coverage detected