JR cc, nn 001cc000 00 NZ 01 Z 10 NC 11 C 12 Cycles if taken 8 Cycles if not taken Flags affected(znhc): ---- */

JR Z, e - 0x18 Jump relative, to the offset e. 12 cycles Flags affected(znhc): ---- */

LD A, (0xFF00 + C) - 0xF2 Read from io-port C 8 Cycles Flags affected(znhc): ---- */

LD A, (0xFF00 + n) - 0xF0 Read from io-port n 12 Cycles Flags affected(znhc): ---- */

LD A, (BC) - 0x0A Loads the value stored at the address pointed to by BC into the accumulator. 8 Cycles Flags affected(znhc): ---- */

LD A, (DE) - 0x1A Loads the value stored at the address pointed to by DE and stores in the A register. 8 Cycles Flags affected(znhc): -

LD A, (nn) - 0xFA The contents of the address specified by the operand nn are loaded into the accumulator. 16 Cycles Flags affected(znh

LDD A, (HL) - 0x3A Load the byte at the address specified in the HL register into A, and decrement HL. 8 Cycles Flags affected(znhc): -

LDD (HL), A - 0x32 Load A into the address pointed at by HL. 8 Cycles Flags affected(znhc): ---- */

LD HL, SP+e - 0xF8 ld HL,SP+dd F8 12 00hc HL = SP +/- dd ;dd is 8bit signed number 12 Cycles Flags affected(znhc): 00hc */

LDI A, (HL) - 0x2A Loads the address pointed at by HL into A, then increment HL. 8 Cycles Flags affected(znhc): ---- */

LDI (HL), A - 0x22 Loads A into the address pointed at by HL, then increment HL. 8 Cycles Flags affected(znhc): ---- */

LD SP, HL - 0xF9 Load HL into SP. 8 Cycles Flags affected(znhc): ---- */

LD (0xFF00 + C), A - 0xE2 Loads the contents of the A register into 0xFF00 + C. 8 Cycles Flags affected(znhc): ---- */

LD (0xFF00 + n), A - 0xE0 Loads the contents of the A register into 0xFF00 + n. 12 Cycles Flags affected(znhc): ---- */

LD (bc), a 00000010 The contents of the accumulator are loaded to the memory location specified by the contents of the register pair BC.

LD (de), a 00010010 The contents of the accumulator are loaded to the memory location specified by the contents of the register pair DE.

LD (HL), n - 0x36 The contents of n are loaded into the memory location specifed by the contents of the HL register pair. 12 Cycles

LD (HL), r 01110rrr The contents of register r are loaded into the memory locoation specifed by the contents of the HL register pair. The

LD (nn), A - 0xEA The contents of the accumulator are loaded into the address specified by the operand nn. 16 Cycles Flags affected

LD (nn), SP - 0x08 The contents of the stack pointer are loaded into the address specified by the operand nn. 20 Cycles Flags affec

LD r, R 01rrrRRR The contents of any register R are loaded into another other register r, where R and r identify a register A, B, C, D, E

LD r, (hl) 01rrr110 The contents of the memory location (HL) are loaded into register r, where r identifies a register A, B, C, D, E, H,

LD r, n 00rrr110 nnnnnnnn The 8-bit integer n is loaded to any register r, where r identifies register A, B, C, D, E, H, or L. 8 Cyc

LD rr, nn 00rr0001 nnnnnnnn nnnnnnnn The 2-byte integer nn is loaded into the rr register pair, where rr defines the BC, DL, HL, or SP re

0x00 (NOP)

OR (HL) - 0xB6 The logical OR operation is performed between the value at memory location (HL) and the byte contained in the accumulator. The

OR n - 0xF6 The logical OR operation is performed between the byte in n and the byte contained in the accumulator. The result is stored in th

OR r 10110rrr The logical OR operation is performed between the register specified in the r operand and the byte contained in the accumul

POP rr 11qq0001 The top two bytes of the external memory stack are popped into register pair qq. The stack pointer holds the 16-bit addre

PUSH rr 11qq0101 The contents of the register pair rr are pushed to the external memory stack. The stack pointer holds the 16-bit address

RES b, (HL) 16 Cycles Flags affected(znhc): ---- */

RES b, r 11001011 10bbbrrr Bit b in operand r is reset. 8 Cycles Flags affected(znhc): ---- */

RET - 0xC9 return, PC=(SP), SP=SP+2 16 Cycles Flags affected(znhc): ---- */

RETI - 0xD9 Return and enable interrupts. 16 Cycles Flags affected(znhc): ---- */

RET cc 11ccc000 000 NZ 001 Z 010 NC 011 C 20 Cycles if taken 8 Cycles if not taken Flags affected(znhc): ---- */

RL A - 0x17 */

RLCA 00000111 The contents of the accumulator are rotated left 1-bit position. Bit 7 is copied to the carry flag and also to bit 0.

RLC (HL) 16 Cycles Flags affected(znhc): z00c */

RLC r 11001011(CB) 00000rrr The contents of 8-bit register r are rotated left 1-bit position. The content of bit 7 is copied to the carry

RL (HL) 16 Cycles Flags affected(znhc): z00c */

RL r 11001011(CB) 00010rrr The contents of 8-bit register r are rotated left 1-bit position. The content of bit 7 is copied to the carry

RR A - 0x17 4 Cycles Flags affected(znhc): 000c */

RRCA - 0x0F The contents off the accumulator are roated right 1-bit. Bit 0 is copied to the carry flag and also to bit 7. 4 Cycles

RRC (HL) 16 Cycles Flags affected(znhc): z00c */

RRC r 11001011(CB) 00001rrr The contents of 8-bit register r are rotated right 1-bit position. The content of bit 0 is copied to the carr

RR (HL) 16 Cycles Flags affected(znhc): z00c */

RR r 11001011(CB) 00001rrr The contents of 8-bit register r are rotated right 1-bit position. The content of bit 0 is copied to the carry

RST 11ttt111 000 0x00 001 0x08 010 0x10 011 0x18 100 0x20 101 0x28 110 0x30 111 0x38 16 Cycles if taken

IMemoryUnit

IMemoryUnit

IMemoryUnit

IMemoryUnit

IMemoryUnit

IMemoryUnit

SBC A, (HL) - 0x9E The byte at the memory address specified by the contents of the HL register pair and the accumulator is subtracted from th

SBC A, n - 0xDE The 8-bit value n, along with the carry flag, is subtracted from the contents of the Accumulator, and the result is stored in

SBC A, r 10011rrr The 8-bit register r and the contents of the carry flag are subtracted from the contents of the Accumulator, and the re

SCF - 0x37 Sets the carry flag. 4 Cycles Flags affected(znhc): -001 */

SET b, (HL) 16 Cycles Flags affected(znhc): ---- */

SET b, r 11001011 11bbbrrr Bit b in operand r is set. 8 Cycles No flags affected. */

SLA (HL) 16 Cycles Flags affected(znhc): z00c */

SLA r 11001011 00100rrrr An arithmetic shift left 1-bit position is performed on the contents of the operand r. The content of bit 7 is c

SRA (HL) 16 Cycles Flags affected(znhc): z00c */

SRA r 11001011 00101rrr An arithmetic shift right 1-bit position is performed on the contents of the operand r. The content of bit 0 is c

SRL (HL) 16 Cycles Flags affected(znhc): z00c */