| 337 | return cpu_mask_mode(value, cpu.L); |
| 338 | } |
| 339 | static void cpu_write_rp3(int i, uint32_t value) { |
| 340 | value = cpu_mask_mode(value, cpu.L); |
| 341 | switch (i) { |
| 342 | case 0: cpu.registers.BC = value; break; |
| 343 | case 1: cpu.registers.DE = value; break; |
| 344 | case 2: cpu.registers.HL = value; break; |
| 345 | case 3: cpu_write_index(value); break; |
| 346 | default: unreachable(); |
| 347 | } |
| 348 | } |
| 349 | |
| 350 | static bool cpu_read_cc(const int i) { |
| 351 | switch (i) { |
no test coverage detected