| 890 | } |
| 891 | |
| 892 | void cpu_execute(void) { |
| 893 | /* variable declarations */ |
| 894 | int8_t s; |
| 895 | uint32_t w = 0; |
| 896 | |
| 897 | uint8_t old = 0; |
| 898 | uint32_t old_word; |
| 899 | |
| 900 | uint8_t new = 0; |
| 901 | uint32_t new_word; |
| 902 | |
| 903 | uint32_t op_word; |
| 904 | |
| 905 | eZ80registers_t *r = &cpu.registers; |
| 906 | eZ80context_t context; |
| 907 | |
| 908 | while (true) { |
| 909 | cpu_execute_continue: |
| 910 | if (cpu.IEF_wait && cpu.cycles >= cpu.eiDelay) { |
| 911 | cpu.IEF_wait = false; |
| 912 | cpu.IEF1 = cpu.IEF2 = true; |
| 913 | } |
| 914 | if (cpu.NMI || (cpu.IEF1 && (intrpt->status & intrpt->enabled))) { |
| 915 | if (cpu.halted) { |
| 916 | cpu.cycles++; |
| 917 | } else { |
| 918 | cpu_prefetch_discard(); |
| 919 | } |
| 920 | cpu.cycles++; |
| 921 | cpu.L = cpu.IL = cpu.ADL || cpu.MADL; |
| 922 | cpu.IEF1 = cpu.halted = cpu.inBlock = false; |
| 923 | if (cpu.NMI) { |
| 924 | cpu.NMI = false; |
| 925 | cpu_interrupt(0x66); |
| 926 | } else { |
| 927 | cpu.IEF2 = false; |
| 928 | if (cpu.IM == 2) { |
| 929 | cpu_interrupt(0x38); |
| 930 | } else { |
| 931 | if (asic.im2 && cpu.IM == 3) { |
| 932 | cpu.cycles++; |
| 933 | cpu_interrupt(cpu_read_word(r->I << 8 | (bus_rand() & 0xFF))); |
| 934 | } else { |
| 935 | cpu_interrupt(bus_rand() & 0x38); |
| 936 | } |
| 937 | } |
| 938 | } |
| 939 | cpu_restore_next(); |
| 940 | cpu_inst_start(); |
| 941 | } else if (cpu.halted) { |
| 942 | cpu_halt(); |
| 943 | } else { |
| 944 | cpu_restore_next(); |
| 945 | } |
| 946 | if (cpu.cycles >= cpu.next) { |
| 947 | break; |
| 948 | } |
| 949 | if (cpu.inBlock) { |
no test coverage detected