| 880 | } |
| 881 | |
| 882 | void cpu_restore_next(void) { |
| 883 | if (cpu.NMI || (cpu.IEF1 && (intrpt->status & intrpt->enabled)) || cpu_check_signals() != CPU_SIGNAL_NONE) { |
| 884 | cpu.next = 0; /* always applies, even after cycle rewind during port writes */ |
| 885 | } else if (cpu.IEF_wait) { |
| 886 | cpu.next = cpu.eiDelay; /* execute one instruction */ |
| 887 | } else { |
| 888 | cpu.next = sched_event_next_cycle(); |
| 889 | } |
| 890 | } |
| 891 | |
| 892 | void cpu_execute(void) { |
| 893 | /* variable declarations */ |
no test coverage detected