| 8486 | return v; |
| 8487 | } |
| 8488 | void mem_access_delay_byte_write (uaecptr addr, uae_u32 v) |
| 8489 | { |
| 8490 | regs.db = (v << 8) | v; |
| 8491 | regs.write_buffer = v; |
| 8492 | switch (ce_banktype[addr >> 16]) |
| 8493 | { |
| 8494 | case CE_MEMBANK_CHIP16: |
| 8495 | case CE_MEMBANK_CHIP32: |
| 8496 | wait_cpu_cycle_write (addr, 0, v); |
| 8497 | return; |
| 8498 | case CE_MEMBANK_FAST16: |
| 8499 | case CE_MEMBANK_FAST32: |
| 8500 | put_byte (addr, v); |
| 8501 | x_do_cycles_post (4 * cpucycleunit, v); |
| 8502 | return; |
| 8503 | } |
| 8504 | put_byte (addr, v); |
| 8505 | } |
| 8506 | void mem_access_delay_word_write (uaecptr addr, uae_u32 v) |
| 8507 | { |
| 8508 | regs.db = v; |
no test coverage detected