Configure the period of an event * * @param period Millisecond period for repeatedly dispatching an event */

* ppp_info - log an informational message. */

Prepares resource related objects - toolchain, target, config Positional arguments: src_paths - the paths to source directories target -

/ ! * \brief Allocate an SMP data message buffer to be used for the SMP protocol messages. * * \param len Message length in bytes. * * \re

/ ! * \brief Send an SMP command packet. * * \param pCcb Connection control block. * \param pPkt Buffer containing the packet. *

* Encodes s32_t integer into a pbuf chained ASN1 msg. * * @param pbuf_stream points to a pbuf stream * @param octets_needed encoding length (from s

Find a USB device and execute a testing function. Search is based on usb_dev_serial_number. If the device is found, the test_fun is e

RFC 6206 Rule 1 */

* @ingroup udp_raw * Send data to a specified address using UDP. * * @param pcb UDP PCB used to send the data. * @param p chain of pbuf's to be se

* @brief Stop ADC conversion. * @param hadc ADC handle * @param ConversionGroup ADC group regular and/or injected. * This parameter ca

* @brief Enable the selected ADC. * @note Prerequisite condition to use this function: ADC must be disabled * and voltage regulator mus

/ ! * \brief Check if a BD address is all zeros. * * \param pAddr Pointer to address. * * \return TRUE if address is all zeros, FALSE otherwis

/

* @brief Enable module clock * @param[in] u32ModuleIdx is module index. Including : * - \ref PDMA_MODULE * - \ref

* @brief This function check selected clock source status * @param[in] u32ClkMask is selected clock source. Including : * - \ref

Set the FLASH wait states for the passed frequency */ * brief Set the flash wait states for the input freuqency. * param iFreq : Input frequency * r

* @brief Handle CRYP hardware block Timeout when waiting for CCF flag to be raised. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that

* @brief Handle CRYP hardware block Timeout when waiting for CCF flag to be raised. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that

* Function Name: Cy_CTB_SetAnalogSwitch ****************************************************************************/ * * Provide firmware control of

* Function Name: Cy_DMA_Channel_Enable ****************************************************************************/ * * The function is used to enabl

* Function Name: Cy_IPC_Drv_IsLockAcquired ****************************************************************************/ * * The function is used to t

\cond INTERNAL */ * Function Name: Cy_SCB_GetFifoSize ****************************************************************************/ * * Returns the RX

* Function Name: Cy_SMIF_PackBytesArray ***************************************************************************/ * * \internal * * This function p

* Function Name: Cy_USBFS_Dev_Drv_SetSieEpMode ****************************************************************************/ * * Sets SIE mode in the

! * @brief DMA starts a transfer. * * This function enables the channel request. Call this function * after submitting a transfer request. * * @

! * @brief Disable the global IRQ * * Disable the global interrupt and return the current primask register. User is required to provided the primas

! * @brief Disable the global IRQ * * Disable the global interrupt and return the current primask register. User is required to provided the primas

! * brief Prepares the eDMA transfer structure. * * This function prepares the transfer configuration structure according to the user input. * *

! * @brief Enable the global IRQ * * Set the primask register with the provided primask value but not just enable the primask. The idea

Get the index corresponding to the FLEXCOMM */

! * @brief Gets the shifter status flags. * * @param base FlexIO peripheral base address * @return shifter status flags */

* @brief This function provides accurate delay (in milliseconds) based * on variable incremented. * @note In the default implementatio

* @brief This function provides minimum delay (in milliseconds) based * on variable incremented. * @note In the default implementation , Sy

* @brief Initializes the GPIOx peripheral according to the specified parameters in the GPIO_Init. * @param GPIOx where x can be (A..G depending on

* @brief Enable the PLL-mode of the MSI. * @note Prior to enable the PLL-mode of the MSI for automatic hardware * calibration LSE oscil

* @brief Initializes the RCC extended peripherals clocks according to the specified * parameters in the RCC_PeriphCLKInitTypeDef. * @para

* @brief Returns the HCLK frequency * @note Each time HCLK changes, this function must be called to update the * right HCLK value. Othe

* @brief Returns the PCLK1 frequency * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 val

* @brief Returns the SYSCLK frequency * @note The system frequency computed by this function is not the real * frequency in the c

* @brief SAI error callback. * @param hsai pointer to a SAI_HandleTypeDef structure that contains * the configuration information fo

* @brief SAI error callback. * @param hsai pointer to a SAI_HandleTypeDef structure that contains * the configuration information fo

* @brief SAI error callback. * @param hsai pointer to a SAI_HandleTypeDef structure that contains * the configuration information fo

* @brief SAI error callback. * @param hsai pointer to a SAI_HandleTypeDef structure that contains * the configuration information fo

* @brief SAI error callback. * @param hsai pointer to a SAI_HandleTypeDef structure that contains * the configuration information fo

* @brief SAI error callback. * @param hsai pointer to a SAI_HandleTypeDef structure that contains * the configuration information fo

* @brief Prepare Control IN transaction * * @param[in] pu8Buf Control IN data pointer * @param[in] u32Size IN transfer size *

---------------------------------------------------------------------------- IRQ Handler Register/Unregister *-------------------------------------

* @brief Get the selected ADC instance enable state. * @note On this STM32 series, flag LL_ADC_FLAG_ADRDY is raised when the ADC * is e

* @brief Get the selected ADC instance enable state. * @note On this STM32 series, flag LL_ADC_FLAG_ADRDY is raised when the ADC * is e

* @brief Get the selected ADC instance enable state. * @note On this STM32 series, flag LL_ADC_FLAG_ADRDY is raised when the ADC * is e

* @brief Get the selected ADC instance enable state. * @note On this STM32 series, flag LL_ADC_FLAG_ADRDY is raised when the ADC * is e

* @brief Set parameter common to several ADC: measurement path to * internal channels (VrefInt, temperature sensor, ...). * Confi

* @brief Force AHB4 peripherals reset. * @rmtoll AHB4RSTR GPIOARST LL_AHB4_GRP1_ForceReset\n * AHB4RSTR GPIOBRST LL_AHB

* @brief Release AHB4 peripherals reset. * @rmtoll AHB4RSTR GPIOARST LL_AHB4_GRP1_ReleaseReset\n * AHB4RSTR GPIOBRST LL

* @brief Force APB2 peripherals reset. * @rmtoll APB2RSTR TIM1RST LL_APB2_GRP1_ForceReset\n * APB2RSTR TIM8RST LL_A

* @brief Force APB2 peripherals reset. * @rmtoll APB2RSTR TIM1RST LL_APB2_GRP1_ForceReset\n * APB2RSTR TIM8RST LL_APB

* @brief Release APB2 peripherals reset. * @rmtoll APB2RSTR TIM1RST LL_APB2_GRP1_ReleaseReset\n * APB2RSTR TIM8RST

* @brief Release APB2 peripherals reset. * @rmtoll APB2RSTR TIM1RST LL_APB2_GRP1_ReleaseReset\n * APB2RSTR TIM8RST LL

* @brief Unmask receive channel occupied interrupt for processor 1. * @rmtoll C1MR CH1OM LL_C1_IPCC_EnableReceiveChannel\n *

* @brief Get AHB prescaler * @rmtoll CFGR HPRE LL_RCC_GetAHBPrescaler * @retval Returned value can be one of the following value

* @brief Check if HSI clock is ready * @rmtoll CR HSIRDY LL_RCC_HSI_IsReady * @retval State of bit (1 or 0). */

* @brief Check if HSI clock is ready * @rmtoll CR HSIRDY LL_RCC_HSI_IsReady * @retval State of bit (1 or 0). */

* @brief Check if LSI1 is Ready * @rmtoll CSR LSI1RDY LL_RCC_LSI1_IsReady * @retval State of bit (1 or 0). */

* @brief Check if PLL1 Ready * @rmtoll CR PLL1RDY LL_RCC_PLL1_IsReady * @retval State of bit (1 or 0). */

* @brief Get the oscillator used as PLL clock source. * @rmtoll PLLCFGR PLLSRC LL_RCC_PLL_GetMainSource * @retval Returned value can

* @brief Check if PLL Ready * @rmtoll CR PLLRDY LL_RCC_PLL_IsReady * @retval State of bit (1 or 0). */

! * @brief Gets the LPSPI Tx FIFO count. * @param base LPSPI peripheral address. * @return The number of words in the transmit FIFO. */

\brief Decode Priority \details Decodes an interrupt priority value with a given priority group to preemptive priority value and subpri

\brief Encode Priority \details Encodes the priority for an interrupt with the given priority group, preemptive priority value, and sub

########################## NVIC functions #################################### */