* @brief Overload: vector by vector multiplication. */
| 474 | * @brief Overload: vector by vector multiplication. |
| 475 | */ |
| 476 | ASTCENC_SIMD_INLINE vint4 operator*(vint4 a, vint4 b) |
| 477 | { |
| 478 | #if ASTCENC_SSE >= 41 |
| 479 | return vint4(_mm_mullo_epi32 (a.m, b.m)); |
| 480 | #else |
| 481 | __m128i t1 = _mm_mul_epu32(a.m, b.m); |
| 482 | __m128i t2 = _mm_mul_epu32( |
| 483 | _mm_srli_si128(a.m, 4), |
| 484 | _mm_srli_si128(b.m, 4)); |
| 485 | __m128i r = _mm_unpacklo_epi32( |
| 486 | _mm_shuffle_epi32(t1, _MM_SHUFFLE (0, 0, 2, 0)), |
| 487 | _mm_shuffle_epi32(t2, _MM_SHUFFLE (0, 0, 2, 0))); |
| 488 | return vint4(r); |
| 489 | #endif |
| 490 | } |
| 491 | |
| 492 | /** |
| 493 | * @brief Overload: vector bit invert. |