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Class vfloat4

Source/astcenc_vecmathlib_sse_4.h:51–178  ·  view source on GitHub ↗

* @brief Data type for 4-wide floats. */

Source from the content-addressed store, hash-verified

49 * @brief Data type for 4-wide floats.
50 */
51struct vfloat4
52{
53 /**
54 * @brief Construct from zero-initialized value.
55 */
56 ASTCENC_SIMD_INLINE vfloat4() = default;
57
58 /**
59 * @brief Construct from 4 values loaded from an unaligned address.
60 *
61 * Consider using loada() which is better with vectors if data is aligned
62 * to vector length.
63 */
64 ASTCENC_SIMD_INLINE explicit vfloat4(const float *p)
65 {
66 m = _mm_loadu_ps(p);
67 }
68
69 /**
70 * @brief Construct from 1 scalar value replicated across all lanes.
71 *
72 * Consider using zero() for constexpr zeros.
73 */
74 ASTCENC_SIMD_INLINE explicit vfloat4(float a)
75 {
76 m = _mm_set1_ps(a);
77 }
78
79 /**
80 * @brief Construct from 4 scalar values.
81 *
82 * The value of @c a is stored to lane 0 (LSB) in the SIMD register.
83 */
84 ASTCENC_SIMD_INLINE explicit vfloat4(float a, float b, float c, float d)
85 {
86 m = _mm_set_ps(d, c, b, a);
87 }
88
89 /**
90 * @brief Construct from an existing SIMD register.
91 */
92 ASTCENC_SIMD_INLINE explicit vfloat4(__m128 a)
93 {
94 m = a;
95 }
96
97 /**
98 * @brief Get the scalar value of a single lane.
99 */
100 template <int l> ASTCENC_SIMD_INLINE float lane() const
101 {
102 return _mm_cvtss_f32(_mm_shuffle_ps(m, m, l));
103 }
104
105 /**
106 * @brief Set the scalar value of a single lane.
107 */
108 template <int l> ASTCENC_SIMD_INLINE void set_lane(float a)

Callers 15

unit4Function · 0.70
unit3Function · 0.70
unit2Function · 0.70
vfloat3Function · 0.70
vfloat2Function · 0.70
powFunction · 0.70
float_to_lnsFunction · 0.70

Calls

no outgoing calls

Tested by 1

TESTFunction · 0.40