Method write

tinygrad/runtime/ops_amd.py:379–381

(self, b:HCQBuffer, val:sint, b64:bool=False)

    return self

  def write(self, b:HCQBuffer, val:sint, b64:bool=False):
    data_sel = self.pm4.data_sel__mec_release_mem__send_64_bit_data if b64 else self.pm4.data_sel__mec_release_mem__send_32_bit_low
    return self.release_mem(b.va_addr, val, data_sel, self.pm4.int_sel__mec_release_mem__none)

  def poll_bit(self, b:HCQBuffer, val:sint, mask:int): return self.wait_reg_mem(val, mask=mask, mem=b.va_addr, op=WAIT_REG_MEM_FUNCTION_EQ)