(P: MLXProgramBuilder, n: Node)
| 966 | |
| 967 | @REGISTRY.register(target=[exir_ops.edge.dim_order_ops._clone_dim_order.default]) |
| 968 | def _dim_order_clone_handler(P: MLXProgramBuilder, n: Node) -> Slot: |
| 969 | # dim_order_ops._clone_dim_order(Tensor self, *, bool non_blocking=False, int[]? dim_order=None) -> Tensor |
| 970 | # This is essentially a contiguous/clone operation for memory layout |
| 971 | args = P.args(n) |
| 972 | kwargs = P.kwargs(n) |
| 973 | require_args(args, 1, 1, "dim_order_ops._clone_dim_order") |
| 974 | require_kwargs( |
| 975 | kwargs, {"non_blocking", "dim_order"}, "dim_order_ops._clone_dim_order" |
| 976 | ) |
| 977 | require_contiguous_format( |
| 978 | dim_order=kwargs.get("dim_order"), |
| 979 | op_name="dim_order_ops._clone_dim_order", |
| 980 | ) |
| 981 | x = args[0] |
| 982 | out = P.make_or_get_slot(n) |
| 983 | P.emit( |
| 984 | ContiguousNode( |
| 985 | x=P.slot_to_tid(x), |
| 986 | out=P.slot_to_tid(out), |
| 987 | ) |
| 988 | ) |
| 989 | return out |
| 990 | |
| 991 | |
| 992 | # Handle Edge IR's dim_order_ops._to_dim_order_copy (dtype conversion) |
nothing calls this directly
no test coverage detected