LogicAnalyzer

Orders

• Direct order (based on availability): https://logicanalyzer.rf.gd
• PCBWay order: https://www.pcbway.com/project/shareproject/LogicAnalyzer_V6_0_cc383781.html

Downloads

• You can find all the compiled projects in the Releases section.
• Latest version: Release 6.0.0.0, 01/02/2024

Release 6.0 is out!

Finally Release 6.0 is completed and comes with many, many changes!

First, I have uploaded the project to PCBWay, I will still serve orders but as there is too much demand to keep up with it I also have uploaded it as a shared project, so you don't need to wait for me having stock. The project is found here: https://www.pcbway.com/project/shareproject/LogicAnalyzer_V6_0_cc383781.html It is right now under review so I expect it to be available in a couple of days.

Next, now the gerber files, BOMs and centroid are included in the release packages so you don't need to search inside the projects in case you want to order it from another manufacturer.

That's regarding logistics, now, a brief resume of the changes:

• Pico2 is supported, the new design solves the problems with the IO glitches.
• Total revamp of the analysis software, including speed up of the rendering, autodetection of the analyzers, and the biggest change, all the Sigrok protocol decoders are supported!
• New terminal capture application, no more long inhuman command lines, configure the capture using the terminal application and trigger the capture specifying the capture settings file! (use TerminalCapture --help for more info)
• New All-in-one package, both apps in a single zip if you want to use both!
• And many, maaaaany more changes.

Next weeks I will update the wiki with updated usage and functionalities, for now if you have doubts read the Discussion section related threads and of course if you need help feel free to open a new thread.

Have fun!

Orders

If you are interested in buying a premade board now you can request to be added to the list in https://logicanalyzer.rf.gd/

Orders and sponsor, what is this about?

Ok, now, the explanation. It is getting to the point of being unmanageable the amount of requests, so I have created a website to make it easier to track these, I don't want to forget anyone and doing the management manually I'm sure that in one moment or other I would forget someone... Feel free to contact me if ytou find any problem or open a message in the discussion section.

And the sponsoring thing... I never requested anything for these projects, but lately many many people is asking about how to donate so finally I have opened a Ko-Fi account in order to accept them. Feel free to use it, anything is welcome and I will use it in improving the project whenever it is possible :)

Thanks to everyone, the support that I'm receiving with the project is amazing and I never thought that this project would rise so much interest.

Thank you!

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Building V6.0

PLEASE DO NOT BUILD MANUALLY V6.0

It is not in the master as it is a work in progress, is not intended to be used as I upload any change that I do and usually contain known problems. If you want to try the V6.0 beta releases download them form this Mega folder, I update it each time I have significant changes.

https://mega.nz/folder/SGxDHAZL#afLGgQbJAaqOYXjhJBwokQ

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Back!

Hi. I was in a business trip past weeks and got back today, so I have a ton of emails and messages regarding the project unanswered.

I will answer all the emails and requests this weekend/next Monday.

Sorry! :)

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Branches

Please, do not try to build V6_0 by yourself

The V6_0 branch is the branch where I'm working on and I found many users that are downloading it and trying to compile it, don't do it. This branch may be completely broken while I'm doing changes and is not meant to be used by users, the only officially supported branch is the master one, any request regarding other branches will be closed immediatelly.

If you want to test the version 6.0 you can try the latest available test build.

Good news

One of the goals of the new design was to overcome the problems that the Pico 2 have. And at least, the most harmful one seems to be solved. With the regular design the fast/complex trigger sometimes got stuck and the chaining didn't worked, with the new one the triggers seem work properly.

I need to conduct more tests as I have seen some response variations at high frequencies but I'm not sure if its caused by the pico2 itself or the transceivers as the analyzer is pushing them to its maximum limits.

I'm testing the devices with signals at 200Mhz, with the base pico all seems to work properly but with the pico2 I have seen changes on the signals, but, the TXU are rated up to 200Mhz and I'm sampling at 400Ms/s (yes, that's right, the new firmware can sample up to 400Ms/s in blast mode, I will add more info very soon as R6.0 is very close to its release 😄) so what I'm seeing is captures that have skewed samples. The signals that I use are basically square clocks, so I inject a 100Mhz clock what becomes two phases at 200Mhz, and with the pico2 at 400Ms/s I see that sometimes there are three samples of one phase and one sample of the other, and as far as I have seen is always the high phase the one that contains the three samples. This could be caused by the transceivers, they are at its maximum limits, but it can be also caused by the pico2, I suspect that even with the drainig of the GPIOs the signal remains high for some nanoseconds, enough to create these erroneous readings.

In any case, at least this only happens at extreme speeds and for regular use cases it should not affect the readings, and having three times more samples really expands the possibilities.

I will add more info next week after performing more extensive tests.

Stay tuned!

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New PCB design

I have created a new dessign for version 6.0 and is under testing right now. It replaces the headers that were difficult to find, uses 0402 type components so is not intended for manual assembly and also include a VREF switch that allows to change between 3.3v/5v/ext vref.

Once testing is completed I will publish the dessign, I might have some spare boards with all the components already assembled except for the pico, so if you are interested in one of these leave a message un the discussion sections (if I see that there is enough demand I might even think on making a batch of these).

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Pico 2: born dead.

Ok, this are bad news. The Pico 2 has been released in a basically useless status. It has been detected a bug in the GPIO hardware that locks the pins whenever you input a high level, what is known as "Errata E9". According to the official errata the lock only happens when the pull downs are enabled, you input a high level value and then the GPIO starts outputing 2.1v. That doesn't sounds too bad but the reality is very different. I've been testing it and even forcing the pulldowns to be disabled, the PIO triggers the lock. In this state, the RP2350 is useless if you need to use the GPIO's to input any data. The only workaround provided is to disable the pins and enable them when you are going to read and disable them after it to reset the pin status, but as you can imagine with the PIO this is impossible, and even if it was possible the capture speed would be reduced so much that the analyzer would be totally useless.

Unfortunatelly I must stop the port to the Pico 2 until this situation is solved.

Pico 2: a game changer?

I've started checking the Pico 2 and porting the code to it. I must say that it has been one of the easiest transitions that I ever did, just reconfigure the cmake scripts, change a couple of lines, and voi-la! the project runs in the pico 2.

This is the base code, no changes at all, but from here I have multiple improvements to do, starting with the DMA (no mode ping-pong DMAs for the Pico 2, a single DMA can do all the work simplifying the code A LOT) and then upgrading the buffers to three times what are now, I expect to have up to 380k samples :)

Said that, I started checking the limits of the pico 2 and... well, I'm really surprised, with the original pico I only got stable up to 200Mhz, beyond that I had problems with the flash and it got hung, but, oh my gosh, this thing (the pico 2) right now is running at 400Mhz without a single hicup!!

Of course I had to raise the voltage to 1.4v for the core and it gets warmer, but I added a little heatsink to it and it's perfectly fine. Soooo.... I need to test this in deep but this may be a very, very big change, not only three times the samples than the pico, but also twice the speed!

Stay tuned for more news!

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Help wanted!

I'm cooking something very special, if you whant to know what it is and help with it, check this post. 😉

More boards on the go!

One of the new functionalities of the RP2350 is the capability of having two XIP devices and also has the full device implementation (RP2040 only had READ capabilities implemented). This means that is possible to have (for example) a flash device and a PSRAM connected to it. Unfortunatelly the Pico 2 does not expose the QSPI pins and they are tied directly to the flash... But there is hope! PiMoroni has developed the PiMoroni Pico Plus 2 which contains 16Mb of flash and 8Mb of PSRAM.

I already have ordered one of these new boards and have some ideas on what could be done with them :D Right now the most possible one is this: PSRAM is not fast enough for sampling at a decent speed with many channels, BUT, it is fast enough for something like storing ADC samples, so what I'm going to try is to allow the mix of analog and digital channels. The analog channels will be very slow compared to the digital ones (only 500Ks/s) but it still can be useful to monitor behaviors of things like motors, servos or whatever. As the PSRAM is 8Mb it will allow to store up to 8 seconds of analog data on single channel mode (2 bytes per sample at 500Ks/s is roughly 1Mb/s of data), this, combined with the upgraded onboard ram and the burst mode can be really useful in multiple projects.

Stay tuned for more news!

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Exciting news! The Pico 2 is coming soon!

As some of you may know the Pico 2 is being released this month. The new Pico 2 is a very exciting upgrade of the pico, more powerful cores, two alternative RiscV cores, three PIO units instead of two and 520Kb of RAM!

This can be a game changer for LogicAnalyzer, only with the new ammount of RAM the quantity of samples is going to increase massively, we're talking about three times the current ammount of samples!

Also, there are really exciting changes on the PIO side, the new IRQ system allows to intercomunicate the PIO units, this means that the trigger pins could be freed now, and this, as small change as it seems can be really amazing combined with the new third PIO unit... Think about this, a 64Mb dual SPI RAM running at 100Mhz connected to the two free pins and controlled at full speed by the third PIO unit...

I was preparing a release for this month but it's going to be delayed, once I receive the new Pico's I will start the development for the Pico 2 and once it's completed I will release all at once.

Stay tuned!

RELEASE 5.1

This release is a QoL release with some functional corrections. For more details check the release page.

RELEASE 5.0, Burst mode is here!

New release with exciting feature!

The biggest change on this release is the Burst mode. With burst mode you can capture blocks of data and the analyzer will rearm itself immediatelly and capture more data when the trigger condition is met again. This will improve the memory usage discarding unneeded samples! Right now only the simple trigger mode accepts burst mode but in a future I will try to implement it in all the other triggers. For more information check the wiki.

Also new features to ease the navigation in the capture viewer have been added like shortcuts and a preview of the full capture. More info in the wiki.

Finally multiple improvements have been done, some bugs in the capture tail detection have been corrected, the USB transfer has been improved using directly the CDC transfer functions and more.

Beware that this version is not compatible with other ones, the protocol has changed. The driver will check the device version and will not connect to it if it is lower than V5.0.

Have fun!

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UPDATE 28/06/2023 - Release 4.5.1 - QOL improvements

This release include some QOL updates to the applications.

LogicAnalyzer app:

• Ammount of on-screen samples will be preserved if you repeat the last capture.
• Added a new menu entry called "Repeat las analysis" to the protocol analyzers, it will execute the last analysis performed to speed up things.
• Changed where config files are stored, they will use the %appData% folder now ($home/.config in Linux).
• Changed horizontal scrollbar visibility.

CLCapture app:

• Now channel names can be provided from the command line.

Have fun!

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UPDATE 11/04/2023 - Release 4.5 - Support for the RP2040-Zero and new board definition system

This release includes only an updat