(
&self,
ins_ref: InstructionRef,
code: &[u8],
diff_config: &DiffObjConfig,
)
| 124 | } |
| 125 | |
| 126 | fn parse_ins_ref( |
| 127 | &self, |
| 128 | ins_ref: InstructionRef, |
| 129 | code: &[u8], |
| 130 | diff_config: &DiffObjConfig, |
| 131 | ) -> Result<unarm::Ins> { |
| 132 | let code = match (self.endianness, ins_ref.size) { |
| 133 | (object::Endianness::Little, 2) => u16::from_le_bytes([code[0], code[1]]) as u32, |
| 134 | (object::Endianness::Little, 4) => { |
| 135 | u32::from_le_bytes([code[0], code[1], code[2], code[3]]) |
| 136 | } |
| 137 | (object::Endianness::Big, 2) => u16::from_be_bytes([code[0], code[1]]) as u32, |
| 138 | (object::Endianness::Big, 4) => { |
| 139 | u32::from_be_bytes([code[0], code[1], code[2], code[3]]) |
| 140 | } |
| 141 | _ => bail!("Invalid instruction size {}", ins_ref.size), |
| 142 | }; |
| 143 | |
| 144 | let thumb = ins_ref.opcode & (1 << 15) == 0; |
| 145 | let discriminant = ins_ref.opcode & !(1 << 15); |
| 146 | let pc = ins_ref.address as u32; |
| 147 | let options = self.unarm_options(diff_config); |
| 148 | |
| 149 | let ins = if ins_ref.opcode == OPCODE_DATA { |
| 150 | match ins_ref.size { |
| 151 | 4 => unarm::Ins::Word(code), |
| 152 | 2 => unarm::Ins::HalfWord(code as u16), |
| 153 | _ => bail!("Invalid data size {}", ins_ref.size), |
| 154 | } |
| 155 | } else if thumb { |
| 156 | unarm::parse_thumb_with_discriminant(code, discriminant, pc, &options) |
| 157 | } else { |
| 158 | unarm::parse_arm_with_discriminant(code, discriminant, pc, &options) |
| 159 | }; |
| 160 | Ok(ins) |
| 161 | } |
| 162 | } |
| 163 | |
| 164 | impl Arch for ArchArm { |
no test coverage detected