| 533 | } |
| 534 | |
| 535 | static void init_replay_dma(void) |
| 536 | { |
| 537 | dma_channel = SEQUENCER_DMA_DmaInitialize( |
| 538 | 1 /* bytes */, |
| 539 | true /* request per burst */, |
| 540 | HI16(CYDEV_SRAM_BASE), |
| 541 | HI16(CYDEV_PERIPH_BASE)); |
| 542 | |
| 543 | for (int i=0; i<BUFFER_COUNT; i++) |
| 544 | td[i] = CyDmaTdAllocate(); |
| 545 | for (int i=0; i<BUFFER_COUNT; i++) |
| 546 | { |
| 547 | int nexti = i+1; |
| 548 | if (nexti == BUFFER_COUNT) |
| 549 | nexti = 0; |
| 550 | |
| 551 | CyDmaTdSetConfiguration(td[i], BUFFER_SIZE, td[nexti], |
| 552 | CY_DMA_TD_INC_SRC_ADR | SEQUENCER_DMA__TD_TERMOUT_EN); |
| 553 | CyDmaTdSetAddress(td[i], LO16((uint32)&dma_buffer[i]), LO16((uint32)REPLAY_FIFO_FIFO_PTR)); |
| 554 | } |
| 555 | } |
| 556 | |
| 557 | static void cmd_write(struct write_frame* f) |
| 558 | { |