| 566 | } |
| 567 | |
| 568 | void FPU::FCOMI(CPU* cpu, int st, int other) { |
| 569 | U32 stTag = GetTag(cpu, st); |
| 570 | U32 otherTag = GetTag(cpu, other); |
| 571 | |
| 572 | // don't want to convert to cache just for inspection |
| 573 | if (isRegCached[other] && isRegCached[st]) { |
| 574 | if (stTag == TAG_Empty || otherTag == TAG_Empty || isnan(this->regCache[st].d) || isnan(this->regCache[other].d)) { |
| 575 | setFlags(cpu, ZF | PF | CF); |
| 576 | return; |
| 577 | } |
| 578 | if (this->regCache[st].d == this->regCache[other].d) { |
| 579 | setFlags(cpu, ZF); |
| 580 | return; |
| 581 | } |
| 582 | if (this->regCache[st].d < this->regCache[other].d) { |
| 583 | setFlags(cpu, CF); |
| 584 | return; |
| 585 | } |
| 586 | // st > other |
| 587 | setFlags(cpu, 0); |
| 588 | } else { |
| 589 | extFloat80_t f1 = getReg(st); |
| 590 | extFloat80_t f2 = getReg(other); |
| 591 | |
| 592 | if (stTag == TAG_Empty || otherTag == TAG_Empty || F80_isnan(f1) || F80_isnan(f2)) { |
| 593 | setFlags(cpu, ZF | PF | CF); |
| 594 | return; |
| 595 | } |
| 596 | if (extF80_eq(f1, f2)) { |
| 597 | setFlags(cpu, ZF); |
| 598 | return; |
| 599 | } |
| 600 | if (extF80_lt(f1, f2)) { |
| 601 | setFlags(cpu, CF); |
| 602 | return; |
| 603 | } |
| 604 | // st > other |
| 605 | setFlags(cpu, 0); |
| 606 | } |
| 607 | } |
| 608 | |
| 609 | void FPU::FCOM(CPU* cpu, int st, int other) { |
| 610 | U32 stTag = GetTag(cpu, st); |
no test coverage detected