| 2317 | } |
| 2318 | |
| 2319 | void testFPUDA() { |
| 2320 | // REGS |
| 2321 | // 0 FCMOV_ST0_STj_CF |
| 2322 | testFpuCmov(0, CF); |
| 2323 | |
| 2324 | // 1 FCMOV_ST0_STj_ZF |
| 2325 | testFpuCmov(1, ZF); |
| 2326 | |
| 2327 | // 2 FCMOV_ST0_STj_CF_OR_ZF |
| 2328 | testFpuCmov(2, CF); |
| 2329 | testFpuCmov(2, ZF); |
| 2330 | testFpuCmov(2, CF | ZF); |
| 2331 | |
| 2332 | // 3 FCMOV_ST0_STj_PF |
| 2333 | testFpuCmov(3, PF); |
| 2334 | |
| 2335 | // 5 FUCOMPP |
| 2336 | testFUCOMPP(); |
| 2337 | |
| 2338 | // MEMORY |
| 2339 | // 0 FIADD_DWORD_INTEGER |
| 2340 | testFMemInt(0xda, 0, 100.0f, 100000, 100100.0f); |
| 2341 | |
| 2342 | // 1 FIMUL_DWORD_INTEGER |
| 2343 | testFMemInt(0xda, 1, 2.0f, 100000, 200000.0f); |
| 2344 | |
| 2345 | // 2 FICOM_DWORD_INTEGER |
| 2346 | testFCOMInt(false); |
| 2347 | |
| 2348 | // 3 FICOM_DWORD_INTEGER_Pop |
| 2349 | testFCOMInt(true); |
| 2350 | |
| 2351 | // 4 FISUB_DWORD_INTEGER |
| 2352 | testFMemInt(0xda, 4, 202020.0f, 100000, 102020.0f); |
| 2353 | |
| 2354 | // 5 FISUBR_DWORD_INTEGER |
| 2355 | testFMemInt(0xda, 5, 202020.0f, 100000, -102020.0f); |
| 2356 | |
| 2357 | // 6 FIDIV_DWORD_INTEGER |
| 2358 | testFMemInt(0xda, 6, 202020.0f, 2, 101010.0f); |
| 2359 | |
| 2360 | // 7 FIDIVR_DWORD_INTEGER |
| 2361 | testFMemInt(0xda, 7, 2.0f, 202020, 101010.0f); |
| 2362 | } |
| 2363 | |
| 2364 | #define FPU_GET_TOP(sw) ((sw & 0x3800) >> 11) |
| 2365 |
no test coverage detected