| 9150 | } |
| 9151 | |
| 9152 | void testPopSeg16(int inst, U8 seg) { |
| 9153 | struct user_desc* ldt = cpu->thread->process->getLDT(0x20); |
| 9154 | ldt->entry_number = 0x20; |
| 9155 | ldt->base_addr = HEAP_ADDRESS; |
| 9156 | ldt->seg_32bit = 1; |
| 9157 | ldt->seg_not_present = 0; |
| 9158 | |
| 9159 | newInstruction(inst, 0); |
| 9160 | cpu->reg[4].u32 -= 2; |
| 9161 | U32 prevStack = cpu->reg[4].u32; |
| 9162 | memory->writed(cpu->seg[SS].address + cpu->reg[4].u16, 0x107); |
| 9163 | cpu->seg[seg].value = 0; |
| 9164 | if (seg != SS) { |
| 9165 | cpu->seg[seg].address = 0; |
| 9166 | } |
| 9167 | cpu->big = 0; |
| 9168 | |
| 9169 | bool checkReadValueIntoAX = false; |
| 9170 | // read seg:[0] into AX to verify that segment can be used |
| 9171 | if (seg != SS && seg != DS) { |
| 9172 | memory->writed(HEAP_ADDRESS, 0x1112); |
| 9173 | switch (seg) { |
| 9174 | case ES: pushCode8(0x26); break; |
| 9175 | case CS: pushCode8(0x2e); break; |
| 9176 | case SS: pushCode8(0x36); break; |
| 9177 | case DS: pushCode8(0xa1); break; |
| 9178 | case FS: pushCode8(0x64); break; |
| 9179 | case GS: pushCode8(0x64); break; |
| 9180 | } |
| 9181 | pushCode8(0xa1); |
| 9182 | pushCode8(0); |
| 9183 | pushCode8(0); |
| 9184 | checkReadValueIntoAX = true; |
| 9185 | process->hasSetSeg[seg] = true; |
| 9186 | } |
| 9187 | runTestCPU(); |
| 9188 | if (cpu->reg[4].u16 != prevStack + 2) { |
| 9189 | failed("stack wasn't incremented by 2"); |
| 9190 | } |
| 9191 | if (cpu->seg[seg].value != 0x107) { |
| 9192 | failed("seg value was not set"); |
| 9193 | } |
| 9194 | if (cpu->seg[seg].address != HEAP_ADDRESS) { |
| 9195 | failed("seg address was not set"); |
| 9196 | } |
| 9197 | if (checkReadValueIntoAX && cpu->reg[0].word[0] != 0x1112) { |
| 9198 | failed("seg address read wrong value"); |
| 9199 | } |
| 9200 | } |
| 9201 | |
| 9202 | void testPushSeg32(int inst, U8 seg) { |
| 9203 | U32 prevStack = cpu->reg[4].u32; |
no test coverage detected