| 3165 | } |
| 3166 | |
| 3167 | void MovSwEw() { |
| 3168 | struct user_desc* ldt = cpu->thread->process->getLDT(0x20); |
| 3169 | ldt->entry_number = 0x20; |
| 3170 | ldt->base_addr = HEAP_ADDRESS; |
| 3171 | ldt->seg_32bit = 1; |
| 3172 | ldt->seg_not_present = 0; |
| 3173 | |
| 3174 | for (int ew = 0; ew < 8; ew++) { |
| 3175 | for (int sw = 0; sw < 6; sw++) { |
| 3176 | Reg* e; |
| 3177 | |
| 3178 | if (sw == CS) { // not allowed with this instruction |
| 3179 | continue; |
| 3180 | } |
| 3181 | setup(); // reset segs |
| 3182 | int rm = ew | (sw << 3) | 0xC0; |
| 3183 | newInstructionWithRM(0x8e, rm, 0); |
| 3184 | e = &cpu->reg[ew]; |
| 3185 | e->u32 = 0xDDDD0107; |
| 3186 | cpu->seg[sw].value = 0; |
| 3187 | cpu->seg[sw].address = 0; |
| 3188 | |
| 3189 | memory->writed(HEAP_ADDRESS, 0xAAAA1112); |
| 3190 | |
| 3191 | // read seg:[0] into AX to verify that segment can be used |
| 3192 | switch (sw) { |
| 3193 | case ES: pushCode8(0x26); break; |
| 3194 | case SS: pushCode8(0x36); break; |
| 3195 | case DS: pushCode8(0x3e); break; |
| 3196 | case FS: pushCode8(0x64); break; |
| 3197 | case GS: pushCode8(0x65); break; |
| 3198 | } |
| 3199 | pushCode8(0xa1); |
| 3200 | if (cpu->big) { |
| 3201 | pushCode32(0); |
| 3202 | } else { |
| 3203 | pushCode16(0); |
| 3204 | } |
| 3205 | |
| 3206 | runTestCPU(); |
| 3207 | |
| 3208 | if (cpu->seg[sw].value != 0x107) { |
| 3209 | failed("seg value was not set"); |
| 3210 | } |
| 3211 | if (cpu->seg[sw].address != HEAP_ADDRESS) { |
| 3212 | failed("seg address was not set"); |
| 3213 | } |
| 3214 | if (cpu->reg[0].word[0] != 0x1112) { |
| 3215 | failed("seg address read wrong value"); |
| 3216 | } |
| 3217 | } |
| 3218 | } |
| 3219 | |
| 3220 | for (int sw = 0; sw < 6; sw++) { |
| 3221 | if (sw == CS) { // not allowed with this instruction |
| 3222 | continue; |
| 3223 | } |
| 3224 | setup(); // reset segs |
no test coverage detected