| 1511 | } |
| 1512 | |
| 1513 | void GwEd(int instruction, struct Data* data) { |
| 1514 | while (data->valid) { |
| 1515 | int ew; |
| 1516 | int gw; |
| 1517 | int rm; |
| 1518 | |
| 1519 | for (ew = 0; ew < 8; ew++) { |
| 1520 | for (gw = 0; gw < 8; gw++) { |
| 1521 | Reg* e; |
| 1522 | Reg* g; |
| 1523 | |
| 1524 | rm = ew | (gw << 3) | 0xC0; |
| 1525 | newInstructionWithRM(instruction, rm, data->flags); |
| 1526 | pushConstant(data); |
| 1527 | e = &cpu->reg[G(rm)]; |
| 1528 | g = &cpu->reg[E(rm)]; |
| 1529 | |
| 1530 | g->u32 = DEFAULT; |
| 1531 | e->u32 = data->var1; |
| 1532 | g->u16 = data->var2; |
| 1533 | runTestCPU(); |
| 1534 | assertResult(data, cpu, instruction, e->u32, g->u32, E(rm), G(rm), 0, 32); |
| 1535 | } |
| 1536 | } |
| 1537 | |
| 1538 | for (gw = 0; gw < 8; gw++) { |
| 1539 | Reg* g; |
| 1540 | |
| 1541 | rm = (gw << 3); |
| 1542 | if (cpu->big) |
| 1543 | rm += 5; |
| 1544 | else |
| 1545 | rm += 6; |
| 1546 | newInstructionWithRM(instruction, rm, data->flags); |
| 1547 | if (cpu->big) |
| 1548 | pushCode32(200); |
| 1549 | else |
| 1550 | pushCode16(200); |
| 1551 | pushConstant(data); |
| 1552 | memory->writed(cpu->seg[DS].address + 200, DEFAULT); |
| 1553 | memory->writew(cpu->seg[DS].address + 200, data->var2); |
| 1554 | g = &cpu->reg[G(rm)]; |
| 1555 | g->u32 = data->var1; |
| 1556 | runTestCPU(); |
| 1557 | assertResult(data, cpu, instruction, g->u32, 0, G(rm), -1, cpu->seg[DS].address + 200, 32); |
| 1558 | } |
| 1559 | data++; |
| 1560 | } |
| 1561 | } |
| 1562 | |
| 1563 | void EwGwCl(int instruction, struct Data* data) { |
| 1564 | while (data->valid) { |
no test coverage detected