| 1867 | } |
| 1868 | |
| 1869 | void EdSw(int instruction, struct Data* data) { |
| 1870 | while (data->valid) { |
| 1871 | int ew; |
| 1872 | int gw; |
| 1873 | int rm; |
| 1874 | |
| 1875 | for (ew = 0; ew < 8; ew++) { |
| 1876 | for (gw = 0; gw < 6; gw++) { |
| 1877 | Reg* e; |
| 1878 | U32* g; |
| 1879 | |
| 1880 | rm = ew | (gw << 3) | 0xC0; |
| 1881 | newInstructionWithRM(instruction, rm, data->flags); |
| 1882 | pushConstant(data); |
| 1883 | e = &cpu->reg[ew]; |
| 1884 | g = &cpu->seg[gw].value; |
| 1885 | e->u32 = data->var1; |
| 1886 | *g = data->var2; |
| 1887 | runTestCPU(); |
| 1888 | assertResult(data, cpu, instruction, e->u16, *g, ew, -1, 0, 32); |
| 1889 | } |
| 1890 | } |
| 1891 | |
| 1892 | for (gw = 0; gw < 6; gw++) { |
| 1893 | U32* g; |
| 1894 | U32 result; |
| 1895 | |
| 1896 | rm = (gw << 3); |
| 1897 | if (cpu->big) |
| 1898 | rm += 5; |
| 1899 | else |
| 1900 | rm += 6; |
| 1901 | newInstructionWithRM(instruction, rm, data->flags); |
| 1902 | if (cpu->big) |
| 1903 | pushCode32(200); |
| 1904 | else |
| 1905 | pushCode16(200); |
| 1906 | pushConstant(data); |
| 1907 | memory->writed(cpu->seg[DS].address + 200, DEFAULT); |
| 1908 | memory->writew(cpu->seg[DS].address + 200, data->var1); |
| 1909 | g = &cpu->seg[gw].value; |
| 1910 | *g = data->var2; |
| 1911 | runTestCPU(); |
| 1912 | result = memory->readw(cpu->seg[DS].address + 200); |
| 1913 | assertResult(data, cpu, instruction, result, *g, -1, -1, cpu->seg[DS].address + 200, 32); |
| 1914 | } |
| 1915 | data++; |
| 1916 | } |
| 1917 | } |
| 1918 | |
| 1919 | void GwEw(int instruction, struct Data* data, bool includeLock = false) { |
| 1920 | while (data->valid) { |
no test coverage detected