| 2140 | } |
| 2141 | |
| 2142 | void EdIx(int instruction, int which, struct Data* data, bool includeLock = false) { |
| 2143 | while (data->valid) { |
| 2144 | int ed; |
| 2145 | int rm; |
| 2146 | U32 result; |
| 2147 | |
| 2148 | if ((S8)(data->var2 & 0xFF) != (S32)data->var2) { |
| 2149 | data++; |
| 2150 | continue; |
| 2151 | } |
| 2152 | for (ed = 0; ed < 8; ed++) { |
| 2153 | Reg* e; |
| 2154 | |
| 2155 | rm = ed | (which << 3) | 0xC0; |
| 2156 | newInstructionWithRM(instruction, rm, data->flags); |
| 2157 | pushCode8(data->var2); |
| 2158 | e = &cpu->reg[ed]; |
| 2159 | e->u32 = data->var1; |
| 2160 | runTestCPU(); |
| 2161 | assertResult(data, cpu, instruction, e->u32, 0, -1, -1, 0, 0); |
| 2162 | } |
| 2163 | |
| 2164 | for (int lock = 0; lock < 2; lock++) { |
| 2165 | rm = (which << 3); |
| 2166 | if (cpu->big) |
| 2167 | rm += 5; |
| 2168 | else |
| 2169 | rm += 6; |
| 2170 | newInstructionWithRM(instruction, rm, data->flags, lock ? LOCK_PREFIX : 0); |
| 2171 | U16 addressOffset = lock == 2 ? 202 : 200; |
| 2172 | |
| 2173 | if (cpu->big) |
| 2174 | pushCode32(addressOffset); |
| 2175 | else |
| 2176 | pushCode16(addressOffset); |
| 2177 | pushCode8(data->var2); |
| 2178 | memory->writed(cpu->seg[DS].address + addressOffset, data->var1); |
| 2179 | runTestCPU(); |
| 2180 | result = memory->readd(cpu->seg[DS].address + addressOffset); |
| 2181 | assertResult(data, cpu, instruction, result, 0, -1, -1, 0, 0); |
| 2182 | if (!includeLock) { |
| 2183 | break; |
| 2184 | } |
| 2185 | } |
| 2186 | data++; |
| 2187 | } |
| 2188 | } |
| 2189 | |
| 2190 | void EdIb(int instruction, int which, struct Data* data, bool includeLock = false) { |
| 2191 | while (data->valid) { |
no test coverage detected