| 2089 | } |
| 2090 | |
| 2091 | void EdCl(int instruction, int which, struct Data* data) { |
| 2092 | struct Data* start = data; |
| 2093 | for (int i = 0; i < 2; i++) { |
| 2094 | while (data->valid) { |
| 2095 | int ed; |
| 2096 | int rm; |
| 2097 | U32 result; |
| 2098 | |
| 2099 | for (ed = 0; ed < 8; ed++) { |
| 2100 | Reg* reg; |
| 2101 | |
| 2102 | if (ed == 1) |
| 2103 | continue; |
| 2104 | rm = ed | (which << 3) | 0xC0; |
| 2105 | newInstructionWithRM(instruction, rm, data->flags); |
| 2106 | reg = &cpu->reg[ed]; |
| 2107 | ECX = DEFAULT; |
| 2108 | reg->u32 = data->var1; |
| 2109 | CL = data->var2; |
| 2110 | if (i == 1) { |
| 2111 | useFlags(); // for dynamic core, this will result in a different code path because the flags won't be needed |
| 2112 | } |
| 2113 | runTestCPU(); |
| 2114 | assertResult(data, cpu, instruction, reg->u32, 0, ed, -1, 0, 32, i == 1); |
| 2115 | } |
| 2116 | |
| 2117 | rm = (which << 3); |
| 2118 | if (cpu->big) |
| 2119 | rm += 5; |
| 2120 | else |
| 2121 | rm += 6; |
| 2122 | newInstructionWithRM(instruction, rm, data->flags); |
| 2123 | ECX = DEFAULT; |
| 2124 | CL = data->var2; |
| 2125 | if (cpu->big) |
| 2126 | pushCode32(200); |
| 2127 | else |
| 2128 | pushCode16(200); |
| 2129 | memory->writed(cpu->seg[DS].address + 200, data->var1); |
| 2130 | if (i == 1) { |
| 2131 | useFlags(); // for dynamic core, this will result in a different code path because the flags won't be needed |
| 2132 | } |
| 2133 | runTestCPU(); |
| 2134 | result = memory->readd(cpu->seg[DS].address + 200); |
| 2135 | assertResult(data, cpu, instruction, result, 0, -1, -1, cpu->seg[DS].address + 200, 32, i == 1); |
| 2136 | data++; |
| 2137 | } |
| 2138 | data = start; |
| 2139 | } |
| 2140 | } |
| 2141 | |
| 2142 | void EdIx(int instruction, int which, struct Data* data, bool includeLock = false) { |
| 2143 | while (data->valid) { |
no test coverage detected