| 3394 | typedef void (*DECODER)(DecodeData* obj); |
| 3395 | |
| 3396 | void decodeEa16(DecodeData* data, DecodedOp* op, U8 rm) { |
| 3397 | if (rm<0x40) { |
| 3398 | switch (rm & 7) { |
| 3399 | case 0x00: op->base=data->ds; op->rm=regBX; op->sibIndex=regSI; break; |
| 3400 | case 0x01: op->base=data->ds; op->rm=regBX; op->sibIndex=regDI; break; |
| 3401 | case 0x02: op->base=data->ss; op->rm=regBP; op->sibIndex=regSI; break; |
| 3402 | case 0x03: op->base=data->ss; op->rm=regBP; op->sibIndex=regDI; break; |
| 3403 | case 0x04: op->base=data->ds; op->rm=regSI; op->sibIndex=regZero; break; |
| 3404 | case 0x05: op->base=data->ds; op->rm=regDI; op->sibIndex=regZero; break; |
| 3405 | case 0x06: op->base=data->ds; op->rm=regZero;op->data.disp = (S16)data->fetch16(); op->sibIndex=regZero; op->sibIndex=regZero; break; |
| 3406 | case 0x07: op->base=data->ds; op->rm=regBX; op->sibIndex=regZero; break; |
| 3407 | } |
| 3408 | } else { |
| 3409 | if (rm<0x80) { |
| 3410 | op->data.disp = (S8)data->fetch8(); |
| 3411 | } else { |
| 3412 | op->data.disp = (S16)data->fetch16(); |
| 3413 | } |
| 3414 | switch (rm & 7) { |
| 3415 | case 0x00: op->base=data->ds; op->rm=regBX; op->sibIndex=regSI; break; |
| 3416 | case 0x01: op->base=data->ds; op->rm=regBX; op->sibIndex=regDI; break; |
| 3417 | case 0x02: op->base=data->ss; op->rm=regBP; op->sibIndex=regSI; break; |
| 3418 | case 0x03: op->base=data->ss; op->rm=regBP; op->sibIndex=regDI; break; |
| 3419 | case 0x04: op->base=data->ds; op->rm=regSI; op->sibIndex=regZero; break; |
| 3420 | case 0x05: op->base=data->ds; op->rm=regDI; op->sibIndex=regZero; break; |
| 3421 | case 0x06: op->base=data->ss; op->rm=regBP; op->sibIndex=regZero; break; |
| 3422 | case 0x07: op->base=data->ds; op->rm=regBX; op->sibIndex=regZero; break; |
| 3423 | } |
| 3424 | } |
| 3425 | } |
| 3426 | |
| 3427 | U32 SibE2Reg[8] = {regAX, regCX, regDX, regBX, regZero, regBP, regSI, regDI}; |
| 3428 | |