| 481 | } |
| 482 | |
| 483 | static uintptr_t write_coreboot_table(uintptr_t rom_table_end) |
| 484 | { |
| 485 | struct lb_header *head; |
| 486 | |
| 487 | printk(BIOS_DEBUG, "Writing coreboot table at 0x%08lx\n", |
| 488 | (long)rom_table_end); |
| 489 | |
| 490 | head = lb_table_init(rom_table_end); |
| 491 | |
| 492 | #if CONFIG(USE_OPTION_TABLE) |
| 493 | { |
| 494 | struct cmos_option_table *option_table = |
| 495 | cbfs_map("cmos_layout.bin", NULL); |
| 496 | if (option_table) { |
| 497 | struct lb_record *rec_dest = lb_new_record(head); |
| 498 | /* Copy the option config table, it's already a |
| 499 | * lb_record... |
| 500 | */ |
| 501 | memcpy(rec_dest, option_table, option_table->size); |
| 502 | /* Create CMOS checksum entry in coreboot table */ |
| 503 | lb_cmos_checksum(head); |
| 504 | } else { |
| 505 | printk(BIOS_ERR, |
| 506 | "cmos_layout.bin could not be found!\n"); |
| 507 | } |
| 508 | } |
| 509 | #endif |
| 510 | |
| 511 | /* Generate CFR entry for setup menus */ |
| 512 | if (CONFIG(DRIVERS_OPTION_CFR)) |
| 513 | lb_cfr_setup_menu(head); |
| 514 | |
| 515 | /* Serialize resource map into mem table types (LB_MEM_*) */ |
| 516 | bootmem_write_memory_table(lb_memory(head)); |
| 517 | |
| 518 | /* Record our motherboard */ |
| 519 | lb_mainboard(head); |
| 520 | |
| 521 | /* Record the serial ports and consoles */ |
| 522 | if (CONFIG(CONSOLE_SERIAL)) |
| 523 | lb_add_serial(head); |
| 524 | |
| 525 | if (CONFIG(CONSOLE_USB)) |
| 526 | lb_add_console(LB_TAG_CONSOLE_EHCI, head); |
| 527 | |
| 528 | if (CONFIG(PCI)) |
| 529 | lb_pcie(head); |
| 530 | |
| 531 | /* Record our various random string information */ |
| 532 | lb_strings(head); |
| 533 | if (CONFIG(PLATFORM_USES_FSP2_0)) |
| 534 | lb_string_platform_blob_version(head); |
| 535 | lb_record_version_timestamp(head); |
| 536 | /* Record our framebuffer */ |
| 537 | lb_framebuffer(head); |
| 538 | |
| 539 | /* Record our GPIO settings (ChromeOS specific) */ |
| 540 | if (CONFIG(CHROMEOS)) |
no test coverage detected