| 78 | } |
| 79 | |
| 80 | static void uart8250_mem_init(void *base, unsigned int divisor) |
| 81 | { |
| 82 | /* Disable interrupts */ |
| 83 | uart8250_write(base, UART8250_IER, 0x0); |
| 84 | /* Enable FIFOs */ |
| 85 | uart8250_write(base, UART8250_FCR, UART8250_FCR_FIFO_EN); |
| 86 | |
| 87 | /* Assert DTR and RTS so the other end is happy */ |
| 88 | uart8250_write(base, UART8250_MCR, UART8250_MCR_DTR | UART8250_MCR_RTS); |
| 89 | |
| 90 | /* DLAB on */ |
| 91 | uart8250_write(base, UART8250_LCR, UART8250_LCR_DLAB | CONFIG_TTYS0_LCS); |
| 92 | |
| 93 | uart8250_write(base, UART8250_DLL, divisor & 0xFF); |
| 94 | uart8250_write(base, UART8250_DLM, (divisor >> 8) & 0xFF); |
| 95 | |
| 96 | /* Set to 3 for 8N1 */ |
| 97 | uart8250_write(base, UART8250_LCR, CONFIG_TTYS0_LCS); |
| 98 | } |
| 99 | |
| 100 | void uart_init(unsigned int idx) |
| 101 | { |
no test coverage detected