SetControl writes NR$6B low 7 bits (the enable bit is handled separately by SetEnabled, but in practice the wire layer decomposes the byte and calls b

idAdd writes a sector ID field: sync, A1 mark, FE mark, CHRN, CRC, then GAP II. crcError corrupts the CRC bytes so the FDC's CRC check fails — used to

Per-opcode I/O contention. Each I/O opcode routes its port access through memory.ContendPort, so an access to a contended ULA port (even port, address

Active reports whether the IF1 shadow ROM is currently paged in. When true, MemoryRead returns IF1 ROM bytes for any address in 0x0000-0x3FFF, hiding

AltROMReg returns the current NextReg $8C value.

Bytes serialises the recording to a fresh byte slice using the supplied options. Closes any active input block first so the file is in a consistent st

EnterConfigMode is the symmetric counterpart to ClearConfigMode. Called from the NextReg $03 OnWrite handler when guest code requests bits 2-0 = 111 (

HandleKeyEvent processes a Fyne key event with modifier information.

Move accumulates host-mouse deltas into the X / Y counters. dx and dy are signed deltas in "mouse units" — usually pixels, but the Spectrum software i

NewROMManager creates a new ROM manager

RAM8KPage returns the 8 KB main-RAM page addressed by the hardware MMU bank index `bank8k` (the value an NR$50-57 / port-7FFD write selects). The Next

Add operation with carry handling

blockSum is the IF1 block checksum: a running 8-bit sum where each step does ADD then ADC #1, with the special case that a result of 0xFF (after the +

classifyBranch test matrix. classifyBranch attributes each PC transition to a BranchSource category for the debugger's history view. Sources: 1 = JP

dataAdd writes a sector data field: sync, A1 prefix, FB/F8 mark, data bytes, CRC, then GAP III. crcError corrupts the data CRC. Returns the position o

gap4Add fills the rest of the track with the gap byte.

newTestMachine builds a machine on the synthetic ROM and advances one frame so CPU.Tstates() is large enough for frame-relative arithmetic without und

newTrackBuilder wraps a freshly-created Track for byte-stream assembly.

postindexAdd writes the post-index gap (between the index mark and the first sector ID).

preindexAdd writes the pre-index gap, sync, mark, and the index mark (0xFC).

CurrentBlock returns the current block index.

LoadBytes parses a snapshot from an in-memory byte slice using the supplied format. Used by callers that have the snapshot bytes available without a b

LoadROM reads a previously-installed ROM by basename. Returns ErrROMNotInstalled if the file is missing; any other error is wrapped with the offending

NewEngine returns an Engine with three freshly-reset AY chips.

SetActiveBank installs the RAM bank that holds the first 16 KB of the active framebuffer. Only bits 6-0 of v are kept — bit 7 is reserved on real hard

SetEnabled toggles the sprite layer.

beginResult enters the result phase with the supplied bytes.

newTrack allocates a Track with the given byte capacity and zeroes the data area to the specified filler byte. clocks and weak start cleared.

pushC pushes a 16-bit value through contended write cycles (hi byte first at SP-1, then lo at SP-2). Used by converted stack opcodes; plain push() is

respondR1 queues a 1-byte R1 response, preceded by one $FF Ncr byte. A real card holds DataOut high for at least one byte between a command's last bit

Chip returns the chip at index i (0..2), or nil if i is out of range.

GenerateStereo fills buf with interleaved left/right 16-bit samples (length must be even). Silent unless the master enable bit (reg 0x1C bit 0) is set

HandlePortRead handles reads from DISCiPLE I/O ports.

NewRecording creates a fresh, empty recording.

Path returns the directory where Spectrum Next ROMs are installed. Resolution order: 1. $ZX_GO_NEXT_ROM_DIR if set (test sandbox override). 2. <repo-

Read parses an RZX file from a byte slice. The format is documented in libspectrum's rzx.c (the canonical implementation): a 10-byte header followed b

Scan reads the keyboard matrix for a given port address. The high byte of the address determines which rows are being scanned.

StartInput opens a fresh input recording block at the given T-state offset and makes it the active target for subsequent StoreFrame calls. Mirrors lib

WritePort applies a Beta register write.

makeST0 builds a Status Register 0 byte with the current US/HD bits filled in and the supplied IC code applied. NR is set automatically when the selec

newPagerAutomapped returns a Pager with automap enabled, since real hardware boots with automap *off* and the bootrom enables it via NextReg $06 bit 4

parseUserHex accepts $XX, 0xXX, bare hex, or decimal-with-d suffix. The default is hex because the debugger's primary audience reads memory in hex. Th

renderAll re-renders the whole frame at the current static state (used by the renderer unit tests and for a one-shot repaint).

Subtract operation

trdImage builds a small in-memory TR-DOS .TRD image with each sector filled with a deterministic, position-dependent pattern so reads can be checked a

writeASCII stores an ASCII null-terminated string in memMap.

Buttons returns the current button bitmap (active-low).

Len returns the current number of stored entries.

Play starts tape playback from the current block.

RecordIN is the ULA-hook entry point. The ULA calls this for every IN-port read so the byte gets appended to the current frame's recorded sequence.

RenderScanline writes len(dst) palette-indexed bytes for visible row y. Caller controls dst length; we read at most that many pixels and stop. Out-of-

SetDE writes the DE register pair.

SetROMBankExtended honours the full byte written to NextReg $8E per the FPGA paging logic. Bits 1:0 select ROM bank as before (delegated to SetROMBank

Track returns the track at the given head/cylinder, or nil if absent.

EnableMultiface enables the Multiface interface

MemoryRead is the PeripheralRead-compatible callback the memory package calls for ROM-area addresses. Returns the IF1 ROM byte when the IF1 is active,

New constructs an idle printer. The motor is off, no rows are buffered. Attach via PeripheralManager.EnableZXPrinter.

New returns an empty copper.

ReadRegister returns the current value of a register.

SetKey presses (pressed=true) or releases a matrix key at row (0-8) and column bit (0-7). The matrix is active-low, so a press drives the bit to 0.

WriteCS handles a write to port 0xE7. Per the divMMC spec, bit 0 is the CS for SD slot 0 (master) and bit 1 is the CS for SD slot 1 (slave). Both are

X returns the current X counter value. Used by tests and the UI status bar.

blockSandwich runs a block-spec test: load a TZX with two standard 0x10 blocks bracketing the block-under-test. Both standards should be present iff t

Compare operation

dsDisk builds a small 2-side, 2-cylinder disk with sectors 1..9 per track, addressable through the µPD765 read/seek/sense path.

mustStoreFrame is a test helper that calls StoreFrame and fails the test on any error. Used to keep test setup uncluttered while still satisfying errc

Check evaluates every watch against the supplied State and returns true if any of them should halt the CPU. The watch's last-observed value is updated

GetROM returns the 8KB GDOS ROM.

NMI (Non-Maskable Interrupt) handling - for Multiface red button

NewError constructs an esxDOS-coded error.

PaletteForLayer returns the currently-active palette for the given layer, honouring the per-layer first/second selection (independent of the write-tar

ReadStatus returns the status register, applying the LOST_DATA timeout (a Type II/III transfer whose DRQ goes unserviced) and the not-ready bit.

ReadTrackReg / WriteTrackReg / ReadSectorReg / WriteSectorReg expose the track and sector registers (Beta ports $3F and $5F).

SetWritePtrHighAndMode sets the high 2 cursor bits (val bits 0-1) AND the start-mode (val bits 6-7).

Y returns the current Y counter value.

Logical operations

frameTStatesForModel returns the ULA frame length in 3.5 MHz T-states for a machine model: 48K = 69888; the 128K family (128K/+2/+2A/+3) and the Spect

Interrupt handling. Callers gate this on c.IFF1 before invocation (see ExecuteFrame); the IFF1 check inside is the safety net for any future caller th

AddSnap appends a snapshot block to the recording. The automatic flag distinguishes intermediate snapshots (autosaves that Rollback / RollbackTo can r

Get returns the 9-bit value at the given index.

GetROMBank returns the currently-active ROM bank at 0x0000-0x3FFF (0..3 for the four Next ROM banks, or -1 if the active slot 0 is RAM rather than ROM

HandlePortRead processes an IN instruction targeting an IF1 port. Returns (value, true) if the address decodes to an IF1 port, (0xFF, false) otherwise

NewImage returns a zero-filled image of the given geometry.