RemoveInterface2Cartridge ejects any inserted IF2 cartridge and resets the CPU back into BASIC.

RemovePostFetchHook deregisters a post-fetch hook by name.

RenderIndexed turns a palette-indexed framebuffer (rows of byte indices, row-major) into an *image.RGBA via colorOf. Pure function — the shared pixel

Reset restores the power-on state: position cleared, no buttons pressed. Does not detach the mouse from the peripheral bus.

Reset performs a cold reset: the Z80 restarts at $0000 with ROM0 paged in and the ASIC paging/registers, border, line interrupt and raster state retur

ResetPaging zeroes the classic paging shadows (port_7FFD, port_1FFD and port_DFFD). Mirrors the FPGA reset block at zxnext.vhd:3647-3648 (`port_7ffd_r

Restore applies the given snapshot back to the emulator. Pause management lives inside applySnapshotToEmulator. On the Next, the full machine state (w

Root returns the embeddable canvas object.

Row returns the 8 horizontal pixels for scanline (0..7) of the character referenced by display byte b. Bit 7 of the result is the leftmost pixel; a se

SaveOverrides writes the given override map (physical key name -> MappingEntry list) to path as JSON. The caller chooses which entries to persist; thi

SavePagingState captures the current paging configuration into a PagingState.

SaveScreenshot captures the current screen and writes it as a PNG to path. Useful for human debugging when an automated test fails — pop the saved ima

SaveTAP writes the currently loaded blocks back to a TAP file. Each block is emitted as a 16-bit little-endian length followed by the raw block bytes

SetBetaDisk attaches (or, with nil, detaches) the Beta Disk / TR-DOS interface. Port I/O is gated on Memory.IsBetaActive so it only intercepts the $1F

Render generates the current frame. SetBorderTracer installs a callback fired on every ULA border- colour change (whatever even-address port was used)

SetClip sets the tilemap clip window (NR$1B). Visible pixels are X in [x1*2, x2*2+1] (in 40-col 2-pixel units; the bounds double in 80-col so the defa

SetClock attaches a CPU-T-state source. With it, burst-mode + prescaler transfers interleave with the CPU via Step(). Optional — without it, burst tra

SetConfigWriteHook installs a debug callback fired on every successful config-mode write. Called from headless test paths hunting load-path corruption

SetCycleSink attaches the callback used to charge a continuous-mode transfer's T-state duration to the CPU clock. Optional.

SetDAC attaches a Spectrum Next DAC bank whose output will be mixed into the beeper + AY stream. Pass nil to detach.

SetDiscipleInhibit sets the Disciple inhibit state

SetDivMMCRAM wires a divMMC RAM accessor. Without this, NR$04 values $08..$0F (the divMMC RAM 16 KB banks per FPGA nextreg.txt) behave as if the bank

SetFallbackColour installs the NR$4A fallback RGBA — shown where every layer is transparent at a pixel.

SetInhibit sets the inhibit state.

SetLayer2ActiveBank / SetLayer2ShadowBank record NR$12 / NR$13 — the 16K RAM bank holding the first segment of Layer-2 (and its shadow). Used by the L

SetMode80 is the dual.

SetMultifaceEnabled sets the Multiface enabled state

SetPageLogger installs a diagnostic hook fired on overlay paged-state transitions (see pageLogger). Pass nil to disable.

SetPersistPath enables battery-backed persistence of the NVRAM at the given file path, loading any existing contents immediately. Pass "" to disable p

SetPlus3Speedlock toggles the Speedlock copy-protection workaround on the +3 FDC. Enable this for games that use Speedlock; leave it off for normal so

SetPlus3WriteProtect toggles the per-drive write-protect flag.

SetTilemapTransparency installs the tilemap transparency nibble (NextReg 0x4C, low 4 bits). A tilemap pixel is transparent when the low nibble of its

SetTrace registers a callback invoked at every RST 8 dispatch. Pass nil to disconnect.

SetTrigger sets the external clock/trigger input level (i_clk_trg). In HW this must be synchronized to i_CLK; it is sampled on the next Tick.

SetZeroOnTop sets the NextReg $15 bit 6 "sprite_priority" mode: when true the lowest-numbered sprite is drawn in front of higher-numbered overlapping

Snapshot returns a copy of the current map for iteration/listing without holding the lock.

SpecDrumEnabled / CovoxEnabled report the current state.

SpeedLocked reports whether the speed selector is pinned (LockSpeedSelect).

StartRecording begins capturing the audio output to a WAV file. Returns nil if no audio system is available (in which case recording is silently skipp

TilemapIs80Col reports whether the tilemap is in 80-column (640-pixel) mode. When true the ULA renders the wide path (renderWide) and the 320-pixel pa

WaitIfPaused blocks the calling goroutine (the headless loop) while the debugger is in paused state. Returns immediately if not paused. Called between

Wire is the umbrella that installs every NextReg handler in one call. Callers who want finer-grained control can still call the individual Wire* helpe

WireAltROM installs the NextReg $8C (Alternate ROM) OnWrite handler. Per the SpecNext wiki and TBBlue FPGA verilog, $8C controls a 32 KB alternative R

WireClipWindows installs the faithful clip-window behaviour for NR$18-$1B plus the NR$1C index reset/read-back, replacing the old single-byte approxim

WireConfigModeRAMPage installs the NextReg $04 OnWrite handler. NextReg $04 ("MMU Bank 0 selection in config mode" / REG_RAMPAGE) is the FPGA-firmware

WireJoystickIOMode installs the NextReg $0B OnWrite handler. Per nextreg.txt + zxnext.vhd: bit 7 = 1 to enable I/O mode bits 5:4 = I/O Mode (00=bit

WirePeripheral1 installs the NextReg 0x0A OnWrite handler. NextReg 0x0A ("Peripheral 1 Setting") holds mouse / joystick / AY-mode bits; it does NOT co

WirePeripheral2 installs the NextReg 0x06 OnWrite handler. NextReg 0x06 ("Peripheral 2 Setting") gates the AY audio-chip mode (bits 1:0; 11 = hold all

WireMMU installs OnWrite / OnRead handlers on the NextReg dispatcher for registers 0x50–0x57 so that guest code writing those registers (via port 0x25

Write stores val at addr; ROM and write-protected/absent sections sink to scratch. A write to displayed video memory fires onVideoWrite (if set).

WriteBackTo persists the in-memory image to path. The previous file (if any) is first renamed to path+".bak" so an interrupted write cannot destroy th

WriteBlock copies 512 bytes from src into the LBA. Optional; returning nil from a read-only source rejects writes.

WriteIntEnable performs the separate interrupt-enable write (the FPGA's nr_c5 path, i_int_en_wr). It must not overlap a port write. It updates only co

ZeroOnTop reports the NextReg $15 bit 6 "sprite_priority" mode.

activeAY returns the AY chip that should currently service port 0xFFFD / 0xBFFD traffic. On ModelNext with an Engine wired, this is engine.Active() —

address: lores.vhd:82-98.

altROMBuffer returns the alt-rom 16K buffer for the currently- selected alt-rom (0 or 1). Used by both the read and write paths.

applyDirectBootNextRegs seeds the dispatcher with the post-core-config personality. NR$0A (divMMC automap) goes through WriteReg so the pager's SetAut

basis converts a long name into its 8.3 basis (upper-cased, illegal chars replaced). fits83 reports that the cleaned name fits 8.3 with no character l

blankTRD writes a zero-filled 640 KB (80-track double-sided) TR-DOS image to a temp file and returns its path.

build48KSNA returns a minimal valid 48K .SNA byte stream with the given SP and a PC value pushed on the stack at SP within bank 0 (0xC000 area).

buildRawMGT constructs a minimal MGT image in memory. The image is a 2-side, 80-cylinder, 10 sectors × 512 byte DSDD disk; each sector is filled with

captureBankContext builds the compact paging-context string stored in each ttEntry. Mirrors fmtMMU/fmtDivMMC but is self-contained so it can run from

captureNextStateFromEmu captures full Next state from a live emulator. Returns nil for non-Next models (the Phase-1 ring already covers classic machin

channelLevel computes the linearised output level (signed 16-bit) for one channel. It honours the mixer settings, channel volume register and envelope

checkRAMUninit fires UninitReadObserver if pool byte (bank16k, off) was never written by the guest. Caller gates on m.TrackUninit.

clearSymbol removes a single symbol-table entry. No-op when the entry doesn't exist.

cmdListTp prints every active tracepoint with its hit count.

cmdProvenancePhys queries the physical-pool last-writer table by 16K bank + intra-bank offset, ignoring paging: provenance-phys BANK OFF who la

completeNoResult finishes a command that has no result phase, returning the FDC to the idle command-accepting state.

condState builds the cpuState a Condition / RegWatch evaluates against, capturing the live divMMC paging snapshot so guards like `if dmmc == 1` resolv

configStringToMultifaceVariant inverts the above. An unrecognised or empty string returns Multiface128 (the package default) — callers must gate on cf

containsField reports whether needle appears anywhere in haystack. Used to test for a "key=value" pair inside the formatted divMMC state string.

createTestROMs128 sets up 48.rom + 128-0/1.rom for 128K models.

currentDisk returns the disk currently selected by the f.us field.

diskWithSector builds an 800K MGT disk with a recognisable sector at (cyl, head, sector): byte i = base+i.

dispatchJoystick translates a joystick direction (0=up..4=fire) into the appropriate hardware action for the active joystick interface. For Kempston t

distinctDisplayBytes counts distinct bytes in the visible display page (a proxy for "has the ROM drawn content here").

iter 366: CMD25 WRITE_MULTIPLE_BLOCK. The host sends CMD25 with a start LBA, then streams blocks each framed by a 0xFC token + 512 data + 2 CRC; each

driveReadBit presents the current MSB of readData on SDA.

driveReady reports whether the given logical drive (0..3) currently has a disk in its physical slot.

dsSeed returns the first data byte the position-dependent fill puts at offset 0 of a sector — i.e. the value dsTrack seeds (c,h,r) with.

emitMark writes the 3×A1 address mark prefix (MFM only) with clock bits set on each. For FM the prefix is empty and the caller sets the clock bit on t

emitSync writes the sync field (the gap's syncLen sync bytes).

endTypeII clears Busy/DRQ, sets the given residual status bits, ends any transfer, and raises INTRQ.

explainPoppedReturn inspects the return word most recently consumed by a RET, given the CURRENT SP (i.e. AFTER the RET has incremented SP by 2). On th