| 2710 | |
| 2711 | #[cfg(target_arch = "x86_64")] |
| 2712 | fn read_regs(&self, cpu_id: usize) -> std::result::Result<CoreRegs, DebuggableError> { |
| 2713 | // General registers: RAX, RBX, RCX, RDX, RSI, RDI, RBP, RSP, r8-r15 |
| 2714 | let gregs = self |
| 2715 | .get_regs(cpu_id as u8) |
| 2716 | .map_err(DebuggableError::ReadRegs)?; |
| 2717 | let regs = [ |
| 2718 | gregs.get_rax(), |
| 2719 | gregs.get_rbx(), |
| 2720 | gregs.get_rcx(), |
| 2721 | gregs.get_rdx(), |
| 2722 | gregs.get_rsi(), |
| 2723 | gregs.get_rdi(), |
| 2724 | gregs.get_rbp(), |
| 2725 | gregs.get_rsp(), |
| 2726 | gregs.get_r8(), |
| 2727 | gregs.get_r9(), |
| 2728 | gregs.get_r10(), |
| 2729 | gregs.get_r11(), |
| 2730 | gregs.get_r12(), |
| 2731 | gregs.get_r13(), |
| 2732 | gregs.get_r14(), |
| 2733 | gregs.get_r15(), |
| 2734 | ]; |
| 2735 | |
| 2736 | // GDB exposes 32-bit eflags instead of 64-bit rflags. |
| 2737 | // https://sourceware.org/git/?p=binutils-gdb.git;a=blob;f=gdb/features/i386/64bit-core.xml |
| 2738 | let eflags = gregs.get_rflags() as u32; |
| 2739 | let rip = gregs.get_rip(); |
| 2740 | |
| 2741 | // Segment registers: CS, SS, DS, ES, FS, GS |
| 2742 | let sregs = self |
| 2743 | .get_sregs(cpu_id as u8) |
| 2744 | .map_err(DebuggableError::ReadRegs)?; |
| 2745 | let segments = X86SegmentRegs { |
| 2746 | cs: sregs.cs.selector as u32, |
| 2747 | ss: sregs.ss.selector as u32, |
| 2748 | ds: sregs.ds.selector as u32, |
| 2749 | es: sregs.es.selector as u32, |
| 2750 | fs: sregs.fs.selector as u32, |
| 2751 | gs: sregs.gs.selector as u32, |
| 2752 | }; |
| 2753 | |
| 2754 | // TODO: Add other registers |
| 2755 | |
| 2756 | Ok(CoreRegs { |
| 2757 | regs, |
| 2758 | eflags, |
| 2759 | rip, |
| 2760 | segments, |
| 2761 | ..Default::default() |
| 2762 | }) |
| 2763 | } |
| 2764 | |
| 2765 | #[cfg(target_arch = "aarch64")] |
| 2766 | fn read_regs(&self, cpu_id: usize) -> std::result::Result<CoreRegs, DebuggableError> { |