(
&mut self,
base: u64,
offset: u64,
data: &[u8],
)
| 1245 | } |
| 1246 | |
| 1247 | pub(crate) fn write_bar( |
| 1248 | &mut self, |
| 1249 | base: u64, |
| 1250 | offset: u64, |
| 1251 | data: &[u8], |
| 1252 | ) -> Option<Arc<Barrier>> { |
| 1253 | let addr = base + offset; |
| 1254 | if let Some(region) = self.find_region(addr) { |
| 1255 | let offset = addr - region.start.raw_value(); |
| 1256 | |
| 1257 | // If the MSI-X table is written to, we need to update our cache. |
| 1258 | if self.interrupt.msix_table_accessed(region.index, offset) { |
| 1259 | self.interrupt.msix_write_table(offset, data); |
| 1260 | } else { |
| 1261 | self.vfio_wrapper.region_write(region.index, offset, data); |
| 1262 | } |
| 1263 | } |
| 1264 | |
| 1265 | // INTx EOI |
| 1266 | // The guest writing to the BAR potentially means the interrupt has |
| 1267 | // been received and can be acknowledged. |
| 1268 | if self.interrupt.intx_in_use() |
| 1269 | && let Err(e) = self.vfio_wrapper.unmask_irq(VFIO_PCI_INTX_IRQ_INDEX) |
| 1270 | { |
| 1271 | error!("Failed unmasking INTx IRQ: {e}"); |
| 1272 | } |
| 1273 | |
| 1274 | None |
| 1275 | } |
| 1276 | |
| 1277 | pub(crate) fn write_config_register( |
| 1278 | &mut self, |
no test coverage detected