(&mut self)
| 1042 | } |
| 1043 | |
| 1044 | fn parse_extended_capabilities(&mut self) { |
| 1045 | let mut current_offset = PCI_CONFIG_EXTENDED_CAPABILITY_OFFSET; |
| 1046 | |
| 1047 | loop { |
| 1048 | let ext_cap_hdr = self.vfio_wrapper.read_config_dword(current_offset); |
| 1049 | |
| 1050 | let cap_id: u16 = (ext_cap_hdr & 0xffff) as u16; |
| 1051 | let cap_next: u16 = ((ext_cap_hdr >> 20) & 0xfff) as u16; |
| 1052 | |
| 1053 | match PciExpressCapabilityId::from(cap_id) { |
| 1054 | PciExpressCapabilityId::AlternativeRoutingIdentificationInterpretation |
| 1055 | | PciExpressCapabilityId::ResizeableBar |
| 1056 | | PciExpressCapabilityId::SingleRootIoVirtualization => { |
| 1057 | let reg_idx = (current_offset / 4) as usize; |
| 1058 | self.patches.insert( |
| 1059 | reg_idx, |
| 1060 | ConfigPatch { |
| 1061 | mask: 0x0000_ffff, |
| 1062 | patch: PciExpressCapabilityId::NullCapability as u32, |
| 1063 | }, |
| 1064 | ); |
| 1065 | } |
| 1066 | _ => {} |
| 1067 | } |
| 1068 | |
| 1069 | if cap_next == 0 { |
| 1070 | break; |
| 1071 | } |
| 1072 | |
| 1073 | current_offset = cap_next.into(); |
| 1074 | } |
| 1075 | } |
| 1076 | |
| 1077 | pub(crate) fn enable_intx(&mut self) -> Result<(), VfioPciError> { |
| 1078 | if let Some(intx) = &mut self.interrupt.intx |
no test coverage detected