(&mut self, _base: u64, offset: u64, data: &mut [u8])
| 378 | |
| 379 | impl BusDevice for PciConfigIo { |
| 380 | fn read(&mut self, _base: u64, offset: u64, data: &mut [u8]) { |
| 381 | // `offset` is relative to 0xcf8 |
| 382 | let value = match offset { |
| 383 | 0..=3 => self.config_address, |
| 384 | 4..=7 => self.config_space_read(), |
| 385 | _ => 0xffff_ffff, |
| 386 | }; |
| 387 | |
| 388 | // Only allow reads to the register boundary. |
| 389 | let start = offset as usize % 4; |
| 390 | let end = start + data.len(); |
| 391 | if end <= 4 { |
| 392 | for i in start..end { |
| 393 | data[i - start] = (value >> (i * 8)) as u8; |
| 394 | } |
| 395 | } else { |
| 396 | for d in data { |
| 397 | *d = 0xff; |
| 398 | } |
| 399 | } |
| 400 | } |
| 401 | |
| 402 | fn write(&mut self, _base: u64, offset: u64, data: &[u8]) -> Option<Arc<Barrier>> { |
| 403 | // `offset` is relative to 0xcf8 |
no test coverage detected