| 868 | |
| 869 | |
| 870 | void PredictSadSkip (int8_t* pRefIndexCache, bool* pMbSkipCache, int32_t* pSadCostCache, int32_t uiRef, |
| 871 | int32_t* iSadPredSkip) { |
| 872 | const int32_t kiRefB = pRefIndexCache[1];//top g_uiCache12_8x8RefIdx[0] - 4 |
| 873 | int32_t iRefC = pRefIndexCache[5];//top-right g_uiCache12_8x8RefIdx[0] - 2 |
| 874 | const int32_t kiRefA = pRefIndexCache[6];//left g_uiCache12_8x8RefIdx[0] - 1 |
| 875 | const int32_t kiSadB = (pMbSkipCache[1] == 1 ? pSadCostCache[1] : 0); |
| 876 | int32_t iSadC = (pMbSkipCache[2] == 1 ? pSadCostCache[2] : 0); |
| 877 | const int32_t kiSadA = (pMbSkipCache[3] == 1 ? pSadCostCache[3] : 0); |
| 878 | int32_t iRefSkip = pMbSkipCache[2]; |
| 879 | |
| 880 | int32_t iCount = 0; |
| 881 | |
| 882 | if (iRefC == REF_NOT_AVAIL) { |
| 883 | iRefC = pRefIndexCache[0];//top-left g_uiCache12_8x8RefIdx[0] - 4 - 1 |
| 884 | iSadC = (pMbSkipCache[0] == 1 ? pSadCostCache[0] : 0); |
| 885 | iRefSkip = pMbSkipCache[0]; |
| 886 | } |
| 887 | |
| 888 | if (kiRefB == REF_NOT_AVAIL && iRefC == REF_NOT_AVAIL && kiRefA != REF_NOT_AVAIL) { |
| 889 | * iSadPredSkip = kiSadA; |
| 890 | } else { |
| 891 | iCount = ((uiRef == kiRefA) && (pMbSkipCache[3] == 1)) << MB_LEFT_BIT; |
| 892 | iCount |= ((uiRef == kiRefB) && (pMbSkipCache[1] == 1)) << MB_TOP_BIT; |
| 893 | iCount |= ((uiRef == iRefC) && (iRefSkip == 1)) << MB_TOPRIGHT_BIT; |
| 894 | switch (iCount) { |
| 895 | case LEFT_MB_POS:// A |
| 896 | *iSadPredSkip = kiSadA; |
| 897 | break; |
| 898 | case TOP_MB_POS:// B |
| 899 | *iSadPredSkip = kiSadB; |
| 900 | break; |
| 901 | case TOPRIGHT_MB_POS:// C or D |
| 902 | *iSadPredSkip = iSadC; |
| 903 | break; |
| 904 | default: |
| 905 | *iSadPredSkip = WelsMedian (kiSadA, kiSadB, iSadC); |
| 906 | break; |
| 907 | } |
| 908 | } |
| 909 | } |
| 910 | } |
no test coverage detected