| 54 | #if defined(X86_ASM) |
| 55 | |
| 56 | uint32_t WelsCPUFeatureDetect (int32_t* pNumberOfLogicProcessors) { |
| 57 | uint32_t uiCPU = 0; |
| 58 | uint32_t uiFeatureA = 0, uiFeatureB = 0, uiFeatureC = 0, uiFeatureD = 0; |
| 59 | int32_t CacheLineSize = 0; |
| 60 | int8_t chVendorName[16] = { 0 }; |
| 61 | uint32_t uiMaxCpuidLevel = 0; |
| 62 | |
| 63 | if (!WelsCPUIdVerify()) { |
| 64 | /* cpuid is not supported in cpu */ |
| 65 | return 0; |
| 66 | } |
| 67 | |
| 68 | WelsCPUId (0, &uiFeatureA, (uint32_t*)&chVendorName[0], (uint32_t*)&chVendorName[8], (uint32_t*)&chVendorName[4]); |
| 69 | uiMaxCpuidLevel = uiFeatureA; |
| 70 | if (uiMaxCpuidLevel == 0) { |
| 71 | /* maximum input value for basic cpuid information */ |
| 72 | return 0; |
| 73 | } |
| 74 | |
| 75 | WelsCPUId (1, &uiFeatureA, &uiFeatureB, &uiFeatureC, &uiFeatureD); |
| 76 | if ((uiFeatureD & 0x00800000) == 0) { |
| 77 | /* Basic MMX technology is not support in cpu, mean nothing for us so return here */ |
| 78 | return 0; |
| 79 | } |
| 80 | |
| 81 | uiCPU = WELS_CPU_MMX; |
| 82 | if (uiFeatureD & 0x02000000) { |
| 83 | /* SSE technology is identical to AMD MMX extensions */ |
| 84 | uiCPU |= WELS_CPU_MMXEXT | WELS_CPU_SSE; |
| 85 | } |
| 86 | if (uiFeatureD & 0x04000000) { |
| 87 | /* SSE2 support here */ |
| 88 | uiCPU |= WELS_CPU_SSE2; |
| 89 | } |
| 90 | if (uiFeatureD & 0x00000001) { |
| 91 | /* x87 FPU on-chip checking */ |
| 92 | uiCPU |= WELS_CPU_FPU; |
| 93 | } |
| 94 | if (uiFeatureD & 0x00008000) { |
| 95 | /* CMOV instruction checking */ |
| 96 | uiCPU |= WELS_CPU_CMOV; |
| 97 | } |
| 98 | if ((!strcmp ((const char*)chVendorName, CPU_Vendor_INTEL)) || |
| 99 | (!strcmp ((const char*)chVendorName, CPU_Vendor_AMD))) { // confirmed_safe_unsafe_usage |
| 100 | if (uiFeatureD & 0x10000000) { |
| 101 | /* Multi-Threading checking: contains of multiple logic processors */ |
| 102 | uiCPU |= WELS_CPU_HTT; |
| 103 | } |
| 104 | } |
| 105 | |
| 106 | if (uiFeatureC & 0x00000001) { |
| 107 | /* SSE3 support here */ |
| 108 | uiCPU |= WELS_CPU_SSE3; |
| 109 | } |
| 110 | if (uiFeatureC & 0x00000200) { |
| 111 | /* SSSE3 support here */ |
| 112 | uiCPU |= WELS_CPU_SSSE3; |
| 113 | } |
no test coverage detected