| 1849 | } |
| 1850 | |
| 1851 | bool UhdmWriter::writeElabProgram(Serializer& s, ModuleInstance* instance, |
| 1852 | program* m, ModPortMap& modPortMap) { |
| 1853 | Netlist* netlist = instance->getNetlist(); |
| 1854 | DesignComponent* mod = instance->getDefinition(); |
| 1855 | if (mod) { |
| 1856 | // Let decls |
| 1857 | if (!mod->getLetStmts().empty()) { |
| 1858 | VectorOflet_decl* decls = s.MakeLet_declVec(); |
| 1859 | m->Let_decls(decls); |
| 1860 | for (auto stmt : mod->getLetStmts()) { |
| 1861 | decls->push_back((let_decl*)stmt.second->Decl()); |
| 1862 | } |
| 1863 | } |
| 1864 | if (!mod->getPropertyDecls().empty()) { |
| 1865 | VectorOfproperty_decl* decls = s.MakeProperty_declVec(); |
| 1866 | m->Property_decls(decls); |
| 1867 | for (auto decl : mod->getPropertyDecls()) { |
| 1868 | decl->VpiParent(m); |
| 1869 | decls->push_back(decl); |
| 1870 | } |
| 1871 | } |
| 1872 | if (!mod->getSequenceDecls().empty()) { |
| 1873 | VectorOfsequence_decl* decls = s.MakeSequence_declVec(); |
| 1874 | m->Sequence_decls(decls); |
| 1875 | for (auto decl : mod->getSequenceDecls()) { |
| 1876 | decl->VpiParent(m); |
| 1877 | decls->push_back(decl); |
| 1878 | } |
| 1879 | } |
| 1880 | // Typepecs |
| 1881 | VectorOftypespec* typespecs = s.MakeTypespecVec(); |
| 1882 | m->Typespecs(typespecs); |
| 1883 | writeDataTypes(mod->getDataTypeMap(), m, typespecs, s, false); |
| 1884 | writeImportedSymbols(mod, s, typespecs); |
| 1885 | // Assertions |
| 1886 | if (mod->getAssertions()) { |
| 1887 | m->Assertions(mod->getAssertions()); |
| 1888 | for (auto ps : *m->Assertions()) { |
| 1889 | ps->VpiParent(m); |
| 1890 | } |
| 1891 | } |
| 1892 | } |
| 1893 | if (netlist) { |
| 1894 | m->Ports(netlist->ports()); |
| 1895 | if (netlist->ports()) { |
| 1896 | typedef std::map<const UHDM::modport*, ModPort*> PortModPortMap; |
| 1897 | PortModPortMap portModPortMap; |
| 1898 | for (auto& entry : netlist->getModPortMap()) { |
| 1899 | portModPortMap.emplace(entry.second.second, entry.second.first); |
| 1900 | } |
| 1901 | |
| 1902 | for (auto obj : *netlist->ports()) { |
| 1903 | obj->VpiParent(m); |
| 1904 | |
| 1905 | if (auto lc = obj->Low_conn()) { |
| 1906 | if (const ref_obj* ro = any_cast<const ref_obj*>(lc)) { |
| 1907 | if (const any* ag = ro->Actual_group()) { |
| 1908 | if (ag->UhdmType() == UHDM::uhdmmodport) { |
nothing calls this directly
no test coverage detected