| 3383 | } |
| 3384 | |
| 3385 | static DecodeStatus DecodeVSHLMaxInstruction(MCInst *Inst, unsigned Insn, |
| 3386 | uint64_t Address, const void *Decoder) |
| 3387 | { |
| 3388 | DecodeStatus S = MCDisassembler_Success; |
| 3389 | unsigned Rm, size; |
| 3390 | unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); |
| 3391 | Rd |= fieldFromInstruction_4(Insn, 22, 1) << 4; |
| 3392 | Rm = fieldFromInstruction_4(Insn, 0, 4); |
| 3393 | Rm |= fieldFromInstruction_4(Insn, 5, 1) << 4; |
| 3394 | size = fieldFromInstruction_4(Insn, 18, 2); |
| 3395 | |
| 3396 | if (!Check(&S, DecodeQPRRegisterClass(Inst, Rd, Address, Decoder))) |
| 3397 | return MCDisassembler_Fail; |
| 3398 | |
| 3399 | if (!Check(&S, DecodeDPRRegisterClass(Inst, Rm, Address, Decoder))) |
| 3400 | return MCDisassembler_Fail; |
| 3401 | |
| 3402 | MCOperand_CreateImm0(Inst, 8 << size); |
| 3403 | |
| 3404 | return S; |
| 3405 | } |
| 3406 | |
| 3407 | static DecodeStatus DecodeShiftRight8Imm(MCInst *Inst, unsigned Val, |
| 3408 | uint64_t Address, const void *Decoder) |
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