| 2199 | } |
| 2200 | |
| 2201 | static DecodeStatus DecodeT2CPSInstruction(MCInst *Inst, unsigned Insn, |
| 2202 | uint64_t Address, const void *Decoder) |
| 2203 | { |
| 2204 | unsigned imod = fieldFromInstruction_4(Insn, 9, 2); |
| 2205 | unsigned M = fieldFromInstruction_4(Insn, 8, 1); |
| 2206 | unsigned iflags = fieldFromInstruction_4(Insn, 5, 3); |
| 2207 | unsigned mode = fieldFromInstruction_4(Insn, 0, 5); |
| 2208 | |
| 2209 | DecodeStatus S = MCDisassembler_Success; |
| 2210 | |
| 2211 | // imod == '01' --> UNPREDICTABLE |
| 2212 | // NOTE: Even though this is technically UNPREDICTABLE, we choose to |
| 2213 | // return failure here. The '01' imod value is unprintable, so there's |
| 2214 | // nothing useful we could do even if we returned UNPREDICTABLE. |
| 2215 | |
| 2216 | if (imod == 1) return MCDisassembler_Fail; |
| 2217 | |
| 2218 | if (imod && M) { |
| 2219 | MCInst_setOpcode(Inst, ARM_t2CPS3p); |
| 2220 | MCOperand_CreateImm0(Inst, imod); |
| 2221 | MCOperand_CreateImm0(Inst, iflags); |
| 2222 | MCOperand_CreateImm0(Inst, mode); |
| 2223 | } else if (imod && !M) { |
| 2224 | MCInst_setOpcode(Inst, ARM_t2CPS2p); |
| 2225 | MCOperand_CreateImm0(Inst, imod); |
| 2226 | MCOperand_CreateImm0(Inst, iflags); |
| 2227 | if (mode) S = MCDisassembler_SoftFail; |
| 2228 | } else if (!imod && M) { |
| 2229 | MCInst_setOpcode(Inst, ARM_t2CPS1p); |
| 2230 | MCOperand_CreateImm0(Inst, mode); |
| 2231 | if (iflags) S = MCDisassembler_SoftFail; |
| 2232 | } else { |
| 2233 | // imod == '00' && M == '0' --> this is a HINT instruction |
| 2234 | int imm = fieldFromInstruction_4(Insn, 0, 8); |
| 2235 | // HINT are defined only for immediate in [0..4] |
| 2236 | if (imm > 4) return MCDisassembler_Fail; |
| 2237 | |
| 2238 | MCInst_setOpcode(Inst, ARM_t2HINT); |
| 2239 | MCOperand_CreateImm0(Inst, imm); |
| 2240 | } |
| 2241 | |
| 2242 | return S; |
| 2243 | } |
| 2244 | |
| 2245 | static DecodeStatus DecodeT2MOVTWInstruction(MCInst *Inst, unsigned Insn, |
| 2246 | uint64_t Address, const void *Decoder) |
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