Store a register.
(&mut self, reg: Reg, mem: AMode, size: OperandSize, flags: MemFlagsData)
| 169 | |
| 170 | /// Store a register. |
| 171 | pub fn str(&mut self, reg: Reg, mem: AMode, size: OperandSize, flags: MemFlagsData) { |
| 172 | use OperandSize::*; |
| 173 | let inst = match (reg.is_int(), size) { |
| 174 | (_, S8) => Inst::Store8 { |
| 175 | rd: reg.into(), |
| 176 | mem, |
| 177 | flags, |
| 178 | }, |
| 179 | (_, S16) => Inst::Store16 { |
| 180 | rd: reg.into(), |
| 181 | mem, |
| 182 | flags, |
| 183 | }, |
| 184 | (true, S32) => Inst::Store32 { |
| 185 | rd: reg.into(), |
| 186 | mem, |
| 187 | flags, |
| 188 | }, |
| 189 | (false, S32) => Inst::FpuStore32 { |
| 190 | rd: reg.into(), |
| 191 | mem, |
| 192 | flags, |
| 193 | }, |
| 194 | (true, S64) => Inst::Store64 { |
| 195 | rd: reg.into(), |
| 196 | mem, |
| 197 | flags, |
| 198 | }, |
| 199 | (false, S64) => Inst::FpuStore64 { |
| 200 | rd: reg.into(), |
| 201 | mem, |
| 202 | flags, |
| 203 | }, |
| 204 | (_, S128) => Inst::FpuStore128 { |
| 205 | rd: reg.into(), |
| 206 | mem, |
| 207 | flags, |
| 208 | }, |
| 209 | }; |
| 210 | |
| 211 | self.emit(inst); |
| 212 | } |
| 213 | |
| 214 | /// Load a signed register. |
| 215 | pub fn sload(&mut self, mem: AMode, rd: WritableReg, size: OperandSize, flags: MemFlagsData) { |