| 380 | } |
| 381 | |
| 382 | uint32 X86Instr::GetTarget(Debugger* debugger, X86CPURegisters* registers) |
| 383 | { |
| 384 | const MCInstrDesc &instDesc = mX86->mInstrInfo->get(mMCInst.getOpcode()); |
| 385 | |
| 386 | if (mMCInst.getNumOperands() < 1) |
| 387 | return 0; |
| 388 | |
| 389 | int opIdx = 0; |
| 390 | auto operand = mMCInst.getOperand(0); |
| 391 | if ((mMCInst.getNumOperands() >= 5) && (instDesc.operands()[0].OperandType == MCOI::OPERAND_REGISTER) && (instDesc.operands()[4].OperandType == MCOI::OPERAND_MEMORY)) |
| 392 | { |
| 393 | opIdx = 4; |
| 394 | operand = mMCInst.getOperand(opIdx); |
| 395 | } |
| 396 | |
| 397 | if (operand.isImm()) |
| 398 | { |
| 399 | auto targetAddr = (uint32)operand.getImm(); |
| 400 | //TODO: LLVM3.8 - add changes to MCInst? |
| 401 | /*if (instDesc.OpInfo[opIdx].OperandType == MCOI::OPERAND_PCREL) |
| 402 | targetAddr += mMCInst.getPCAddr() + mMCInst.getInstLength();*/ |
| 403 | if (instDesc.operands()[opIdx].OperandType == MCOI::OPERAND_PCREL) |
| 404 | targetAddr += mAddress + mSize; |
| 405 | return targetAddr; |
| 406 | } |
| 407 | return 0; |
| 408 | } |
| 409 | |
| 410 | bool X86Instr::PartialSimulate(Debugger* debugger, X86CPURegisters* registers) |
| 411 | { |
no test coverage detected