OCL only reports on L1 cache, so we have to estimate the L2 Cache size. From studying many GPU cards, it is noticed that their is a direct correlation between Cache line and L2 Cache size: - 16KB L2 Cache for each bit in Cache line. Example: RTX3070 (4096KB of L2 Cache, 256Bit of Cache line) --> 256*16KB = 4096KB - This is also valid for all AMD GPU's - Exceptions GTX10XX series have 8KB per bit o
| 101 | // * GTX10XX series have 8KB per bit of cache line |
| 102 | // * iGPU (64bit cacheline) have 5KB per bit of cache line |
| 103 | inline size_t getL2CacheSize(const cl::Device& device) { |
| 104 | const unsigned cacheLine{getMemoryBusWidth(device)}; |
| 105 | return cacheLine * 1024ULL * |
| 106 | (cacheLine == 64 ? 5 |
| 107 | : device.getInfo<CL_DEVICE_NAME>().find("GTX 10") == |
| 108 | std::string::npos |
| 109 | ? 16 |
| 110 | : 8); |
| 111 | } |
| 112 | |
| 113 | inline unsigned getComputeUnits(const cl::Device& device) { |
| 114 | return device.getInfo<CL_DEVICE_MAX_COMPUTE_UNITS>(); |
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