Function metal_graph_encode_layer_batch

ds4.c:19261–19284

Encode one complete layer for prefill by chaining attention and FFN batches. */

                                                    (uint64_t)DS4_N_HC * sizeof(float));
        g->hc_post_by_tier[t] = ds4_gpu_tensor_view(g->hc_split_by_tier[t],
                                                     (uint64_t)DS4_N_HC * sizeof(float),
                                                     (uint64_t)DS4_N_HC * sizeof(float));
        g->hc_comb_by_tier[t] = ds4_gpu_tensor_view(g->hc_split_by_tier[t],
                                                     2ull * DS4_N_HC * sizeof(float),
                                                     (uint64_t)DS4_N_HC * DS4_N_HC * sizeof(float));
        g->attn_cur_by_tier[t] = ds4_gpu_tensor_alloc_ptr_on(t, (uint64_t)DS4_N_EMBD * sizeof(float));
        g->attn_norm_by_tier[t] = ds4_gpu_tensor_alloc_ptr_on(t, (uint64_t)DS4_N_EMBD * sizeof(float));
        g->qr_by_tier[t] = ds4_gpu_tensor_alloc_ptr_on(t, q_rank * sizeof(float));
        g->qr_norm_by_tier[t] = ds4_gpu_tensor_alloc_ptr_on(t, q_rank * sizeof(float));
        g->q_by_tier[t] = ds4_gpu_tensor_alloc_ptr_on(t, q_dim * sizeof(float));
        g->kv_raw_by_tier[t] = ds4_gpu_tensor_alloc_ptr_on(t, (uint64_t)DS4_N_HEAD_DIM * sizeof(float));
        g->kv_by_tier[t] = ds4_gpu_tensor_alloc_ptr_on(t, (uint64_t)DS4_N_HEAD_DIM * sizeof(float));
    }
    bool state_init_ok = true;
    for (uint32_t il = 0; il < DS4_N_LAYER; il++) {
        /* A distributed process owns only its bound layer slice. Persistent
         * KV state must follow that ownership just like the model tensors;
         * allocating every model layer here defeats split-model residency. */
        if (!weights_layer_has_required(&weights->layer[il], il)) continue;
        /* per-layer Class L allocations land on the layer's
         * home tier. placement is NULL on single-tier / diagnostic paths
         * (all-tier-0); non-NULL on the engine path that opted into
         * multi-tier. layer_tier == 0 in single-tier mode is the
         * byte-equivalent path through metal_graph_alloc_kv_cache_tensor_on
         * and ds4_gpu_tensor_alloc_ptr_on. */
        const int layer_tier = placement ? placement[il + 1] : 0;
        g->layer_raw_cache[il] = metal_graph_alloc_kv_cache_tensor_on(