Add packed single-precision (32-bit) floating-point elements in a and b, and store the results in dst. https://www.intel.com/content/www/us/en/docs/in

Blend packed 8-bit integers from a and b using mask, and store the results in dst. https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index

Perform a carry-less multiplication of two 64-bit integers, selected from a and b according to imm8, and store the results in dst. https://www.intel.c

Compare packed double-precision (64-bit) floating-point elements in a and b for equality, and store the results in dst. https://www.intel.com/content/

Compare packed single-precision (32-bit) floating-point elements in a and b for equality, and store the results in dst. https://www.intel.com/content/

Compare packed double-precision (64-bit) floating-point elements in a and b for greater-than-or-equal, and store the results in dst. https://www.intel

Compare packed single-precision (32-bit) floating-point elements in a and b for greater-than-or-equal, and store the results in dst. https://www.intel

Compare packed double-precision (64-bit) floating-point elements in a and b for greater-than, and store the results in dst. https://www.intel.com/cont

Compare packed single-precision (32-bit) floating-point elements in a and b for greater-than, and store the results in dst. https://www.intel.com/cont

Compare packed double-precision (64-bit) floating-point elements in a and b for less-than-or-equal, and store the results in dst. https://www.intel.co

Compare packed single-precision (32-bit) floating-point elements in a and b for less-than-or-equal, and store the results in dst. https://www.intel.co

Compare packed signed 16-bit integers in a and b for less-than, and store the results in dst. Note: This intrinsic emits the pcmpgtw instruction with

Compare packed signed 32-bit integers in a and b for less-than, and store the results in dst. Note: This intrinsic emits the pcmpgtd instruction with

Compare packed double-precision (64-bit) floating-point elements in a and b for less-than, and store the results in dst. https://www.intel.com/content

Compare packed single-precision (32-bit) floating-point elements in a and b for less-than, and store the results in dst. https://www.intel.com/content

Compare packed double-precision (64-bit) floating-point elements in a and b for not-equal, and store the results in dst. https://www.intel.com/content

Compare packed single-precision (32-bit) floating-point elements in a and b for not-equal, and store the results in dst. https://www.intel.com/content

Compare packed double-precision (64-bit) floating-point elements in a and b for not-greater-than-or-equal, and store the results in dst. https://www.i

Compare packed single-precision (32-bit) floating-point elements in a and b for not-greater-than-or-equal, and store the results in dst. https://www.i

Compare packed double-precision (64-bit) floating-point elements in a and b for not-greater-than, and store the results in dst. https://www.intel.com/

Compare packed single-precision (32-bit) floating-point elements in a and b for not-greater-than, and store the results in dst. https://www.intel.com/

Compare packed double-precision (64-bit) floating-point elements in a and b for not-less-than-or-equal, and store the results in dst. https://www.inte

Compare packed single-precision (32-bit) floating-point elements in a and b for not-less-than-or-equal, and store the results in dst. https://www.inte

Compare packed double-precision (64-bit) floating-point elements in a and b for not-less-than, and store the results in dst. https://www.intel.com/con

Compare packed single-precision (32-bit) floating-point elements in a and b for not-less-than, and store the results in dst. https://www.intel.com/con

Compare packed double-precision (64-bit) floating-point elements in a and b to see if neither is NaN, and store the results in dst. https://www.intel.

Compare packed single-precision (32-bit) floating-point elements in a and b to see if neither is NaN, and store the results in dst. https://www.intel.

Compare packed double-precision (64-bit) floating-point elements in a and b to see if either is NaN, and store the results in dst. https://www.intel.c

Compare packed single-precision (32-bit) floating-point elements in a and b to see if either is NaN, and store the results in dst. https://www.intel.c

Compare the lower double-precision (64-bit) floating-point element in a and b for equality, and return the boolean result (0 or 1). https://www.intel.

Compare the lower single-precision (32-bit) floating-point element in a and b for equality, and return the boolean result (0 or 1). https://www.intel.

Convert packed single-precision (32-bit) floating-point elements in a to packed 32-bit integers, and store the results in dst. https://www.intel.com/c

Convert packed single-precision (32-bit) floating-point elements in a to packed 16-bit integers, and store the results in dst. Note: this intrinsic wi

Divide packed double-precision (64-bit) floating-point elements in a by packed elements in b, and store the results in dst. https://www.intel.com/cont

Divide packed single-precision (32-bit) floating-point elements in a by packed elements in b, and store the results in dst. Due to ARMv7-A NEON's lack

Load 128-bits (composed of 2 packed double-precision (64-bit) floating-point elements) from memory into dst. mem_addr must be aligned on a 16-byte bou

Load 128-bits of integer data from memory into dst. mem_addr does not need to be aligned on any particular boundary. https://www.intel.com/content/www

Compare packed double-precision (64-bit) floating-point elements in a and b, and store packed maximum values in dst. https://www.intel.com/content/www

Compare packed single-precision (32-bit) floating-point elements in a and b, and store packed maximum values in dst. dst does not follow the IEEE Stan

Compare packed double-precision (64-bit) floating-point elements in a and b, and store packed minimum values in dst. https://www.intel.com/content/www

Compare packed single-precision (32-bit) floating-point elements in a and b, and store packed minimum values in dst. dst does not follow the IEEE Stan

Compute the approximate reciprocal of packed single-precision (32-bit) floating-point elements in a, and store the results in dst. The maximum relativ

Compute the approximate reciprocal square root of packed single-precision (32-bit) floating-point elements in a, and store the results in dst. The max

Set packed single-precision (32-bit) floating-point elements in dst with the supplied values in reverse order. https://www.intel.com/content/www/us/en

Return vector of type __m128d with all elements set to zero. https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_setzero

Return vector of type __m128 with all elements set to zero. https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_setzero_

Shuffle packed 8-bit integers in a according to shuffle control mask in the corresponding 8-bit element of b, and store the results in dst. https://ww

Compute the square root of packed double-precision (64-bit) floating-point elements in a, and store the results in dst. https://www.intel.com/content/

Compute the square root of packed single-precision (32-bit) floating-point elements in a, and store the results in dst. Due to ARMv7-A NEON's lack of

Subtract packed double-precision (64-bit) floating-point elements in b from packed double-precision (64-bit) floating-point elements in a, and store t

Subtract packed single-precision (32-bit) floating-point elements in b from packed single-precision (32-bit) floating-point elements in a, and store t

emulate vaddvq u8 variant */