| 797 | } |
| 798 | |
| 799 | IDEIFState *ide_init(PhysMemoryMap *port_map, uint32_t addr, uint32_t addr2, |
| 800 | IRQSignal *irq, BlockDevice **tab_bs) |
| 801 | { |
| 802 | int i; |
| 803 | IDEIFState *s; |
| 804 | |
| 805 | s = malloc(sizeof(IDEIFState)); |
| 806 | memset(s, 0, sizeof(*s)); |
| 807 | |
| 808 | s->irq = irq; |
| 809 | s->cmd = 0; |
| 810 | |
| 811 | cpu_register_device(port_map, addr, 1, s, ide_data_readw, ide_data_writew, |
| 812 | DEVIO_SIZE16); |
| 813 | cpu_register_device(port_map, addr + 1, 7, s, ide_ioport_read, ide_ioport_write, |
| 814 | DEVIO_SIZE8); |
| 815 | if (addr2) { |
| 816 | cpu_register_device(port_map, addr2, 1, s, ide_status_read, ide_cmd_write, |
| 817 | DEVIO_SIZE8); |
| 818 | } |
| 819 | |
| 820 | for(i = 0; i < 2; i++) { |
| 821 | if (tab_bs[i]) |
| 822 | s->drives[i] = ide_drive_init(s, tab_bs[i]); |
| 823 | } |
| 824 | s->cur_drive = s->drives[0]; |
| 825 | return s; |
| 826 | } |
| 827 | |
| 828 | /* dummy PCI device for the IDE */ |
| 829 | PCIDevice *piix3_ide_init(PCIBus *pci_bus, int devfn) |
no test coverage detected