| 253 | } |
| 254 | |
| 255 | static void ide_identify(IDEState *s) |
| 256 | { |
| 257 | uint16_t *tab; |
| 258 | uint32_t oldsize; |
| 259 | |
| 260 | tab = (uint16_t *)s->io_buffer; |
| 261 | |
| 262 | memset(tab, 0, 512 * 2); |
| 263 | |
| 264 | stw(tab + 0, 0x0040); |
| 265 | stw(tab + 1, s->cylinders); |
| 266 | stw(tab + 3, s->heads); |
| 267 | stw(tab + 4, 512 * s->sectors); /* sectors */ |
| 268 | stw(tab + 5, 512); /* sector size */ |
| 269 | stw(tab + 6, s->sectors); |
| 270 | stw(tab + 20, 3); /* buffer type */ |
| 271 | stw(tab + 21, 512); /* cache size in sectors */ |
| 272 | stw(tab + 22, 4); /* ecc bytes */ |
| 273 | padstr((char *)(tab + 27), "RISCVEMU HARDDISK", 40); |
| 274 | stw(tab + 47, 0x8000 | MAX_MULT_SECTORS); |
| 275 | stw(tab + 48, 0); /* dword I/O */ |
| 276 | stw(tab + 49, 1 << 9); /* LBA supported, no DMA */ |
| 277 | stw(tab + 51, 0x200); /* PIO transfer cycle */ |
| 278 | stw(tab + 52, 0x200); /* DMA transfer cycle */ |
| 279 | stw(tab + 54, s->cylinders); |
| 280 | stw(tab + 55, s->heads); |
| 281 | stw(tab + 56, s->sectors); |
| 282 | oldsize = s->cylinders * s->heads * s->sectors; |
| 283 | stw(tab + 57, oldsize); |
| 284 | stw(tab + 58, oldsize >> 16); |
| 285 | if (s->mult_sectors) |
| 286 | stw(tab + 59, 0x100 | s->mult_sectors); |
| 287 | stw(tab + 60, s->nb_sectors); |
| 288 | stw(tab + 61, s->nb_sectors >> 16); |
| 289 | stw(tab + 80, (1 << 1) | (1 << 2)); |
| 290 | stw(tab + 82, (1 << 14)); |
| 291 | stw(tab + 83, (1 << 14)); |
| 292 | stw(tab + 84, (1 << 14)); |
| 293 | stw(tab + 85, (1 << 14)); |
| 294 | stw(tab + 86, 0); |
| 295 | stw(tab + 87, (1 << 14)); |
| 296 | } |
| 297 | |
| 298 | static void ide_set_signature(IDEState *s) |
| 299 | { |
no test coverage detected