| 1485 | } |
| 1486 | |
| 1487 | void X86CommonArchitecture::GetOperandTextATT(const xed_decoded_inst_t* const xedd, const uint64_t addr, const size_t len, const xed_operand_values_t* const ov, const xed_inst_t* const xi, vector<InstructionTextToken>& result) const |
| 1488 | { |
| 1489 | unsigned i,j; |
| 1490 | unsigned noperands = xed_inst_noperands(xi); |
| 1491 | |
| 1492 | bool intel_way = false; |
| 1493 | |
| 1494 | if (xed_inst_get_attribute(xi, XED_ATTRIBUTE_ATT_OPERAND_ORDER_EXCEPTION)) |
| 1495 | intel_way = true; |
| 1496 | |
| 1497 | // if (xed_decoded_inst_get_attribute(xedd, XED_ATTRIBUTE_INDEX_REG_IS_POINTER)) |
| 1498 | // { |
| 1499 | // for(j=0; j<noperands; ++j) |
| 1500 | // { |
| 1501 | // i = noperands - j - 1; // never intel_way |
| 1502 | |
| 1503 | // if(xed_operand_name(xed_inst_operand(xi,i)) == XED_OPERAND_MEM0) |
| 1504 | // cout << "%" + xed_reg_enum_t2str(xed3_operand_get_index(xedd)); |
| 1505 | // } |
| 1506 | // } |
| 1507 | |
| 1508 | for(j=0; j<noperands; ++j) |
| 1509 | { |
| 1510 | if (intel_way) |
| 1511 | i = j; |
| 1512 | else |
| 1513 | i = noperands - j - 1; |
| 1514 | |
| 1515 | const xed_operand_t* op = xed_inst_operand(xi, i); |
| 1516 | const xed_operand_enum_t op_name = xed_operand_name(op); |
| 1517 | |
| 1518 | // XED's suppressed operands shouln't be represented in Intel syntax |
| 1519 | if (xed_operand_operand_visibility(op) == XED_OPVIS_SUPPRESSED) |
| 1520 | { |
| 1521 | if ((xed_decoded_inst_get_category(xedd) == XED_CATEGORY_STRINGOP) && |
| 1522 | (op_name == XED_OPERAND_MEM0 || op_name == XED_OPERAND_MEM1)) |
| 1523 | { |
| 1524 | if (op_name == XED_OPERAND_MEM1) |
| 1525 | result.emplace_back(OperandSeparatorToken, m_disassembly_options.separator); |
| 1526 | } |
| 1527 | else |
| 1528 | { |
| 1529 | continue; |
| 1530 | } |
| 1531 | } |
| 1532 | |
| 1533 | switch(xed_operand_name(op)) |
| 1534 | { |
| 1535 | case XED_OPERAND_REG0: |
| 1536 | case XED_OPERAND_REG1: |
| 1537 | case XED_OPERAND_REG2: |
| 1538 | case XED_OPERAND_REG3: |
| 1539 | case XED_OPERAND_REG4: |
| 1540 | case XED_OPERAND_REG5: |
| 1541 | case XED_OPERAND_REG6: |
| 1542 | case XED_OPERAND_REG7: |
| 1543 | case XED_OPERAND_REG8: |
| 1544 | { |