(&self, code: &str, _addr: u64)
| 1991 | } |
| 1992 | |
| 1993 | fn assemble(&self, code: &str, _addr: u64) -> Result<Vec<u8>, String> { |
| 1994 | // FIXME: This does not support any instructions outside the very basic RV32I/RV64I instruction set. |
| 1995 | // It is completely undocumented how to tell LLVM to accept the additional extensions, and may |
| 1996 | // require core changes to enable. |
| 1997 | let arch_triple = if <D::RegFile as RegFile>::Int::width() == 4 { |
| 1998 | "riscv32-none-none" |
| 1999 | } else { |
| 2000 | "riscv64-none-none" |
| 2001 | }; |
| 2002 | |
| 2003 | llvm_assemble( |
| 2004 | code, |
| 2005 | LlvmServicesDialect::Unspecified, |
| 2006 | arch_triple, |
| 2007 | LlvmServicesCodeModel::Default, |
| 2008 | LlvmServicesRelocMode::Static, |
| 2009 | ) |
| 2010 | } |
| 2011 | |
| 2012 | fn is_never_branch_patch_available(&self, data: &[u8], addr: u64) -> bool { |
| 2013 | let op = match D::decode(addr, data) { |
nothing calls this directly
no test coverage detected