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hub / github.com/Vector35/binaryninja-api / GetInstructionText

Method GetInstructionText

arch/arm64/arch_arm64.cpp:794–930  ·  view source on GitHub ↗

Source from the content-addressed store, hash-verified

792
793
794 virtual bool GetInstructionText(const uint8_t* data, uint64_t addr, size_t& len,
795 vector<InstructionTextToken>& result) override
796 {
797 len = 4;
798 Instruction instr;
799 bool tokenizeSuccess = false;
800 char buf[9];
801 if (!Disassemble(data, addr, len, instr))
802 return false;
803
804 memset(buf, 0x20, sizeof(buf));
805 const char* operation = get_operation(&instr);
806 if (operation == nullptr)
807 return false;
808
809 size_t operationLen = strlen(operation);
810 if (operationLen < 8)
811 {
812 buf[8 - operationLen] = '\0';
813 }
814 else
815 buf[1] = '\0';
816
817 result.emplace_back(InstructionToken, operation);
818 result.emplace_back(TextToken, buf);
819 for (size_t i = 0; i < MAX_OPERANDS; i++)
820 {
821 if (instr.operands[i].operandClass == NONE)
822 return true;
823
824 struct InstructionOperand *operand = &(instr.operands[i]);
825
826 if (i != 0)
827 result.emplace_back(OperandSeparatorToken, ", ");
828
829 switch (instr.operands[i].operandClass)
830 {
831 case FIMM32:
832 case IMM32:
833 case IMM64:
834 case LABEL:
835 tokenizeSuccess = tokenize_shifted_immediate(&instr.operands[i], result) == 0;
836 break;
837 case MEM_REG:
838 case MEM_PRE_IDX:
839 case MEM_POST_IDX:
840 case MEM_OFFSET:
841 case MEM_EXTENDED:
842 tokenizeSuccess = tokenize_memory_operand(&instr.operands[i], result) == 0;
843 break;
844 case REG:
845 case SYS_REG:
846 tokenizeSuccess = tokenize_register(&instr.operands[i], 0, result) == 0;
847 break;
848 case MULTI_REG:
849 tokenizeSuccess = tokenize_multireg_operand(&instr.operands[i], result) == 0;
850 break;
851 case CONDITION:

Callers

nothing calls this directly

Calls 3

get_operationFunction · 0.50
get_register_nameFunction · 0.50

Tested by

no test coverage detected