| 402 | |
| 403 | |
| 404 | static void Repeat( |
| 405 | const xed_decoded_inst_t* const xedd, |
| 406 | LowLevelILFunction& il, |
| 407 | std::function<void ()> addil) |
| 408 | { |
| 409 | const size_t addrSize = xed_decoded_inst_get_machine_mode_bits(xedd) / 8; |
| 410 | LowLevelILLabel trueLabel, falseLabel, doneLabel; |
| 411 | const xed_operand_values_t* const ov = xed_decoded_inst_operands_const(xedd); |
| 412 | |
| 413 | if (xed_operand_values_has_real_rep(ov)) |
| 414 | { |
| 415 | il.AddInstruction(il.Goto(trueLabel)); |
| 416 | il.MarkLabel(trueLabel); |
| 417 | il.AddInstruction(il.If( |
| 418 | il.CompareNotEqual(addrSize, |
| 419 | il.Register(addrSize, GetCountRegister(addrSize)), |
| 420 | il.Const(addrSize, 0)), falseLabel, doneLabel)); |
| 421 | il.MarkLabel(falseLabel); |
| 422 | } |
| 423 | |
| 424 | addil(); |
| 425 | |
| 426 | if (xed_operand_values_has_real_rep(ov)) |
| 427 | { |
| 428 | il.AddInstruction( |
| 429 | il.SetRegister(addrSize, |
| 430 | GetCountRegister(addrSize), |
| 431 | il.Sub(addrSize, |
| 432 | il.Register(addrSize, GetCountRegister(addrSize)), |
| 433 | il.Const(addrSize, 1)))); |
| 434 | |
| 435 | const xed_iclass_enum_t xeddiClass = xed_decoded_inst_get_iclass(xedd); |
| 436 | if (xed_operand_values_has_repne_prefix(ov)) |
| 437 | il.AddInstruction(il.If(il.FlagCondition(LLFC_NE), trueLabel, doneLabel)); |
| 438 | else if (xed_repe_map(xed_norep_map(xeddiClass)) == xeddiClass) |
| 439 | il.AddInstruction(il.If(il.FlagCondition(LLFC_E), trueLabel, doneLabel)); |
| 440 | else |
| 441 | il.AddInstruction(il.Goto(trueLabel)); |
| 442 | il.MarkLabel(doneLabel); |
| 443 | } |
| 444 | } |
| 445 | |
| 446 | |
| 447 | static void CMovFlagCond(const int64_t addr, const xed_decoded_inst_t* xedd, LowLevelILFunction& il, BNLowLevelILFlagCondition flag) |
no test coverage detected