| 482 | } |
| 483 | |
| 484 | static void loadstoreppcfs(LowLevelILFunction& il, |
| 485 | int load_store_sz, |
| 486 | cs_ppc_op* operand1, /* register that gets read/written */ |
| 487 | cs_ppc_op* operand2, /* location the read/write occurs */ |
| 488 | cs_ppc_op* operand3=0, |
| 489 | bool update=false |
| 490 | ) |
| 491 | { |
| 492 | ExprId tmp = 0; |
| 493 | const int addrsz = 4; |
| 494 | // assume single |
| 495 | if (!load_store_sz) |
| 496 | load_store_sz = 4; |
| 497 | |
| 498 | // operand1.reg = [operand2.reg + operand2.imm] |
| 499 | if (operand2->type == PPC_OP_MEM) |
| 500 | { |
| 501 | if (operand2->mem.disp == 0) |
| 502 | { |
| 503 | tmp = il.Register(4, operand2->mem.base); |
| 504 | } |
| 505 | else |
| 506 | { |
| 507 | tmp = il.Add(addrsz, il.Register(addrsz, operand2->mem.base), il.Const(addrsz, operand2->mem.disp)); |
| 508 | } |
| 509 | } |
| 510 | else if(operand2->type == PPC_OP_REG) |
| 511 | { |
| 512 | if ((operand3 != 0) && (operand3->type == PPC_OP_REG)) |
| 513 | { |
| 514 | tmp = il.Add(4, il.Register(addrsz, operand2->reg), il.Register(addrsz, operand3->reg)); |
| 515 | } |
| 516 | } |
| 517 | |
| 518 | il.AddInstruction(il.SetRegister(load_store_sz, operand1->reg, il.FloatConvert(load_store_sz, il.Operand(1, il.Load(load_store_sz, tmp))))); |
| 519 | |
| 520 | if (update == true) |
| 521 | { |
| 522 | tmp = il.SetRegister(4, operand2->reg, tmp); |
| 523 | il.AddInstruction(tmp); |
| 524 | } |
| 525 | } |
| 526 | |
| 527 | /* returns TRUE - if this IL continues |
| 528 | FALSE - if this IL terminates a block */ |
nothing calls this directly
no test coverage detected