| 287 | |
| 288 | |
| 289 | static ExprId GetMemoryAddress(LowLevelILFunction& il, decomp_result* instr, size_t operand, uint32_t size, |
| 290 | bool canWriteback = true) |
| 291 | { |
| 292 | uint32_t reg, second, t, n; |
| 293 | switch (instr->format->operands[operand].type) |
| 294 | { |
| 295 | case OPERAND_FORMAT_MEMORY_ONE_REG: |
| 296 | reg = GetRegisterByIndex(instr->fields[instr->format->operands[operand].field0]); |
| 297 | return il.Register(4, reg); |
| 298 | case OPERAND_FORMAT_MEMORY_ONE_REG_IMM: |
| 299 | case OPERAND_FORMAT_MEMORY_ONE_REG_OPTIONAL_IMM: |
| 300 | reg = GetRegisterByIndex(instr->fields[instr->format->operands[operand].field0]); |
| 301 | second = instr->fields[instr->format->operands[operand].field1]; |
| 302 | if (canWriteback && HasWriteback(instr, operand)) |
| 303 | { |
| 304 | il.AddInstruction(il.SetRegister(4, reg, il.Add(4, ReadRegister(il, instr, reg), il.Const(4, second)))); |
| 305 | return il.Register(4, reg); |
| 306 | } |
| 307 | return il.Add(4, ReadRegister(il, instr, reg), il.Const(4, second)); |
| 308 | case OPERAND_FORMAT_MEMORY_ONE_REG_NEG_IMM: |
| 309 | reg = GetRegisterByIndex(instr->fields[instr->format->operands[operand].field0]); |
| 310 | second = instr->fields[instr->format->operands[operand].field1]; |
| 311 | if (canWriteback && HasWriteback(instr, operand)) |
| 312 | { |
| 313 | il.AddInstruction(il.SetRegister(4, reg, il.Sub(4, ReadRegister(il, instr, reg), il.Const(4, second)))); |
| 314 | return il.Register(4, reg); |
| 315 | } |
| 316 | return il.Sub(4, ReadRegister(il, instr, reg), il.Const(4, second)); |
| 317 | case OPERAND_FORMAT_MEMORY_ONE_REG_ADD_IMM: |
| 318 | case OPERAND_FORMAT_MEMORY_ONE_REG_OPTIONAL_ADD_IMM: |
| 319 | reg = GetRegisterByIndex(instr->fields[instr->format->operands[operand].field0]); |
| 320 | second = instr->fields[instr->format->operands[operand].field1]; |
| 321 | if (canWriteback && HasWriteback(instr, operand)) |
| 322 | { |
| 323 | if (instr->fields[FIELD_add]) |
| 324 | il.AddInstruction(il.SetRegister(4, reg, il.Add(4, ReadRegister(il, instr, reg), il.Const(4, second)))); |
| 325 | else |
| 326 | il.AddInstruction(il.SetRegister(4, reg, il.Sub(4, ReadRegister(il, instr, reg), il.Const(4, second)))); |
| 327 | return il.Register(4, reg); |
| 328 | } |
| 329 | if (instr->fields[FIELD_add]) |
| 330 | return il.Add(4, ReadRegister(il, instr, reg), il.Const(4, second)); |
| 331 | return il.Sub(4, ReadRegister(il, instr, reg), il.Const(4, second)); |
| 332 | case OPERAND_FORMAT_MEMORY_TWO_REG: |
| 333 | reg = GetRegisterByIndex(instr->fields[instr->format->operands[operand].field0]); |
| 334 | second = GetRegisterByIndex(instr->fields[instr->format->operands[operand].field1]); |
| 335 | if (canWriteback && HasWriteback(instr, operand)) |
| 336 | { |
| 337 | il.AddInstruction(il.SetRegister(4, reg, il.Add(4, ReadRegister(il, instr, reg), il.Register(4, second)))); |
| 338 | return il.Register(4, reg); |
| 339 | } |
| 340 | return il.Add(4, ReadRegister(il, instr, reg), il.Register(4, second)); |
| 341 | case OPERAND_FORMAT_MEMORY_TWO_REG_SHIFT: |
| 342 | reg = GetRegisterByIndex(instr->fields[instr->format->operands[operand].field0]); |
| 343 | second = GetRegisterByIndex(instr->fields[instr->format->operands[operand].field1]); |
| 344 | t = instr->fields[FIELD_shift_t]; |
| 345 | n = instr->fields[FIELD_shift_n]; |
| 346 | if (canWriteback && HasWriteback(instr, operand)) |
no test coverage detected